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davidbiancolindavidbiancolin
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Fix transaction packing in width adapter
1 parent 95420db commit 2aee32e

15 files changed

+108324
-98925
lines changed

‎hdk/cl/developer_designs/cl_firesim/design/cl_firesim.sv‎

Lines changed: 6 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -560,24 +560,6 @@ wire fsimtop_s_axi_rready;
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561561
);
562562

563-
// TODO, we are skipping this for simplicity.
564-
// technically, all addresses will have the MSB set, but since we have access to 16GB of dram, it should still work
565-
//wire [31:0] io_slave_aw_bits_addr;
566-
//assign cl_sh_ddr_awaddr = { 30'b0, io_slave_aw_bits_addr[30:0], 3'b0 }; // TODO: check this
567-
568-
// THESE two are unnecessary now
569-
//wire [63:0] io_slave_w_bits_data;
570-
//assign cl_sh_ddr_wdata = { 448'b0, io_slave_w_bits_data };
571-
572-
// THESE two are unnecessary now
573-
//wire [7:0] io_slave_w_bits_strb;
574-
//assign cl_sh_ddr_wstrb = { 56'b0, io_slave_w_bits_strb };
575-
576-
// THESE two are unnecessary now
577-
//wire [31:0] io_slave_ar_bits_addr;
578-
//assign cl_sh_ddr_araddr = { 30'b0, io_slave_ar_bits_addr[30:0], 3'b0 };
579-
580-
// TODO look at this
581563
// assign cl_sh_ddr_awsize = 3'b110;
582564
// assign cl_sh_ddr_arsize = 3'b110;
583565
//assert ((cl_sh_ddr_awsize == 3'b110) | (!cl_sh_ddr_awvalid)) else $error("INVALID AWSIZE on DRAM IF");
@@ -640,7 +622,9 @@ axi_clock_converter_dramslim clock_convert_dramslim (
640622
.s_axi_awsize(fsimtop_s_axi_awsize), // input wire [2 : 0] s_axi_awsize
641623
.s_axi_awburst(fsimtop_s_axi_awburst), // input wire [1 : 0] s_axi_awburst
642624
.s_axi_awlock(fsimtop_s_axi_awlock), // input wire [0 : 0] s_axi_awlock
643-
.s_axi_awcache(fsimtop_s_axi_awcache), // input wire [3 : 0] s_axi_awcache
625+
// CACHE = xx1x indicates the transcation is modifiable and
626+
// that the converter should back narrow reads into wider ones
627+
.s_axi_awcache(4'h2), // input wire [3 : 0] s_axi_awcache
644628
.s_axi_awprot(fsimtop_s_axi_awprot), // input wire [2 : 0] s_axi_awprot
645629
.s_axi_awregion(fsimtop_s_axi_awregion), // input wire [3 : 0] s_axi_awregion
646630
.s_axi_awqos(fsimtop_s_axi_awqos), // input wire [3 : 0] s_axi_awqos
@@ -664,7 +648,9 @@ axi_clock_converter_dramslim clock_convert_dramslim (
664648
.s_axi_arsize(fsimtop_s_axi_arsize), // input wire [2 : 0] s_axi_arsize
665649
.s_axi_arburst(fsimtop_s_axi_arburst), // input wire [1 : 0] s_axi_arburst
666650
.s_axi_arlock(fsimtop_s_axi_arlock), // input wire [0 : 0] s_axi_arlock
667-
.s_axi_arcache(fsimtop_s_axi_arcache), // input wire [3 : 0] s_axi_arcache
651+
// CACHE = xx1x indicates the transcation is modifiable and
652+
// that the converter should back narrow reads into wider ones
653+
.s_axi_arcache(4'h2), // input wire [3 : 0] s_axi_arcache
668654
.s_axi_arprot(fsimtop_s_axi_arprot), // input wire [2 : 0] s_axi_arprot
669655
.s_axi_arregion(fsimtop_s_axi_arregion), // input wire [3 : 0] s_axi_arregion
670656
.s_axi_arqos(fsimtop_s_axi_arqos), // input wire [3 : 0] s_axi_arqos

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0.dcp‎

284 KB
Binary file not shown.

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0.veo‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
1+
// (c) Copyright 1995-2018 Xilinx, Inc. All rights reserved.
22
//
33
// This file contains confidential and proprietary information
44
// of Xilinx, Inc. and is protected under U.S. and

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0.vho‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
-- (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
1+
-- (c) Copyright 1995-2018 Xilinx, Inc. All rights reserved.
22
--
33
-- This file contains confidential and proprietary information
44
-- of Xilinx, Inc. and is protected under U.S. and

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0.xci‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_SUPPORTS_READ">1</spirit:configurableElementValue>
1818
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_SUPPORTS_WRITE">1</spirit:configurableElementValue>
1919
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FAMILY">virtexuplus</spirit:configurableElementValue>
20-
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FIFO_MODE">0</spirit:configurableElementValue>
20+
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_FIFO_MODE">1</spirit:configurableElementValue>
2121
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_MAX_SPLIT_BEATS">16</spirit:configurableElementValue>
2222
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_M_AXI_ACLK_RATIO">2</spirit:configurableElementValue>
2323
<spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_M_AXI_DATA_WIDTH">512</spirit:configurableElementValue>
@@ -31,7 +31,7 @@
3131
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ACLK_RATIO">1:2</spirit:configurableElementValue>
3232
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ADDR_WIDTH">64</spirit:configurableElementValue>
3333
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">axi_dwidth_converter_0</spirit:configurableElementValue>
34-
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_MODE">0</spirit:configurableElementValue>
34+
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_MODE">1</spirit:configurableElementValue>
3535
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MAX_SPLIT_BEATS">256</spirit:configurableElementValue>
3636
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MI_DATA_WIDTH">512</spirit:configurableElementValue>
3737
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PACKING_LEVEL">1</spirit:configurableElementValue>
@@ -41,12 +41,12 @@
4141
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SI_ID_WIDTH">16</spirit:configurableElementValue>
4242
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.SYNCHRONIZATION_STAGES">3</spirit:configurableElementValue>
4343
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">virtexuplus</spirit:configurableElementValue>
44-
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD"/>
44+
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD">xilinx.com:f1_cl:part0:1.0</spirit:configurableElementValue>
4545
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.DEVICE">xcvu9p</spirit:configurableElementValue>
4646
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PACKAGE">flgb2104</spirit:configurableElementValue>
4747
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.PREFHDL">VERILOG</spirit:configurableElementValue>
4848
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SILICON_REVISION"/>
49-
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">VERILOG</spirit:configurableElementValue>
49+
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SIMULATOR_LANGUAGE">MIXED</spirit:configurableElementValue>
5050
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.SPEEDGRADE">-2</spirit:configurableElementValue>
5151
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.TEMPERATURE_GRADE">I</spirit:configurableElementValue>
5252
<spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.USE_RDI_CUSTOMIZATION">TRUE</spirit:configurableElementValue>
@@ -64,6 +64,7 @@
6464
<xilinx:componentInstanceExtensions>
6565
<xilinx:configElementInfos>
6666
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.ADDR_WIDTH" xilinx:valueSource="user"/>
67+
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.FIFO_MODE" xilinx:valueSource="user"/>
6768
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.MI_DATA_WIDTH" xilinx:valueSource="user"/>
6869
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.SI_DATA_WIDTH" xilinx:valueSource="user"/>
6970
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.SI_ID_WIDTH" xilinx:valueSource="user"/>

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0.xml‎

Lines changed: 21 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -727,11 +727,11 @@
727727
<spirit:parameters>
728728
<spirit:parameter>
729729
<spirit:name>GENtimestamp</spirit:name>
730-
<spirit:value>Sun Oct 01 17:35:56 UTC 2017</spirit:value>
730+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
731731
</spirit:parameter>
732732
<spirit:parameter>
733733
<spirit:name>outputProductCRC</spirit:name>
734-
<spirit:value>7:89b371ff</spirit:value>
734+
<spirit:value>7:574ddaba</spirit:value>
735735
</spirit:parameter>
736736
</spirit:parameters>
737737
</spirit:view>
@@ -770,11 +770,11 @@
770770
<spirit:parameters>
771771
<spirit:parameter>
772772
<spirit:name>GENtimestamp</spirit:name>
773-
<spirit:value>Sun Oct 01 17:36:05 UTC 2017</spirit:value>
773+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
774774
</spirit:parameter>
775775
<spirit:parameter>
776776
<spirit:name>outputProductCRC</spirit:name>
777-
<spirit:value>7:89b371ff</spirit:value>
777+
<spirit:value>7:574ddaba</spirit:value>
778778
</spirit:parameter>
779779
</spirit:parameters>
780780
</spirit:view>
@@ -788,11 +788,11 @@
788788
<spirit:parameters>
789789
<spirit:parameter>
790790
<spirit:name>GENtimestamp</spirit:name>
791-
<spirit:value>Sun Oct 01 17:36:05 UTC 2017</spirit:value>
791+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
792792
</spirit:parameter>
793793
<spirit:parameter>
794794
<spirit:name>outputProductCRC</spirit:name>
795-
<spirit:value>7:89b371ff</spirit:value>
795+
<spirit:value>7:574ddaba</spirit:value>
796796
</spirit:parameter>
797797
</spirit:parameters>
798798
</spirit:view>
@@ -807,11 +807,11 @@
807807
<spirit:parameters>
808808
<spirit:parameter>
809809
<spirit:name>GENtimestamp</spirit:name>
810-
<spirit:value>Sun Oct 01 17:36:05 UTC 2017</spirit:value>
810+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
811811
</spirit:parameter>
812812
<spirit:parameter>
813813
<spirit:name>outputProductCRC</spirit:name>
814-
<spirit:value>7:89b371ff</spirit:value>
814+
<spirit:value>7:574ddaba</spirit:value>
815815
</spirit:parameter>
816816
</spirit:parameters>
817817
</spirit:view>
@@ -850,11 +850,11 @@
850850
<spirit:parameters>
851851
<spirit:parameter>
852852
<spirit:name>GENtimestamp</spirit:name>
853-
<spirit:value>Sun Oct 01 17:36:06 UTC 2017</spirit:value>
853+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
854854
</spirit:parameter>
855855
<spirit:parameter>
856856
<spirit:name>outputProductCRC</spirit:name>
857-
<spirit:value>7:f0f718bd</spirit:value>
857+
<spirit:value>7:661753cc</spirit:value>
858858
</spirit:parameter>
859859
</spirit:parameters>
860860
</spirit:view>
@@ -869,11 +869,11 @@
869869
<spirit:parameters>
870870
<spirit:parameter>
871871
<spirit:name>GENtimestamp</spirit:name>
872-
<spirit:value>Sun Oct 01 17:36:06 UTC 2017</spirit:value>
872+
<spirit:value>Thu Apr 12 03:26:19 UTC 2018</spirit:value>
873873
</spirit:parameter>
874874
<spirit:parameter>
875875
<spirit:name>outputProductCRC</spirit:name>
876-
<spirit:value>7:f0f718bd</spirit:value>
876+
<spirit:value>7:661753cc</spirit:value>
877877
</spirit:parameter>
878878
</spirit:parameters>
879879
</spirit:view>
@@ -887,11 +887,11 @@
887887
<spirit:parameters>
888888
<spirit:parameter>
889889
<spirit:name>GENtimestamp</spirit:name>
890-
<spirit:value>Sun Oct 01 17:36:06 UTC 2017</spirit:value>
890+
<spirit:value>Thu Apr 12 03:26:20 UTC 2018</spirit:value>
891891
</spirit:parameter>
892892
<spirit:parameter>
893893
<spirit:name>outputProductCRC</spirit:name>
894-
<spirit:value>7:89b371ff</spirit:value>
894+
<spirit:value>7:574ddaba</spirit:value>
895895
</spirit:parameter>
896896
</spirit:parameters>
897897
</spirit:view>
@@ -905,11 +905,11 @@
905905
<spirit:parameters>
906906
<spirit:parameter>
907907
<spirit:name>GENtimestamp</spirit:name>
908-
<spirit:value>Sun Oct 01 17:36:06 UTC 2017</spirit:value>
908+
<spirit:value>Thu Apr 12 03:26:20 UTC 2018</spirit:value>
909909
</spirit:parameter>
910910
<spirit:parameter>
911911
<spirit:name>outputProductCRC</spirit:name>
912-
<spirit:value>7:89b371ff</spirit:value>
912+
<spirit:value>7:574ddaba</spirit:value>
913913
</spirit:parameter>
914914
</spirit:parameters>
915915
</spirit:view>
@@ -923,11 +923,11 @@
923923
<spirit:parameters>
924924
<spirit:parameter>
925925
<spirit:name>GENtimestamp</spirit:name>
926-
<spirit:value>Sun Oct 01 17:37:58 UTC 2017</spirit:value>
926+
<spirit:value>Thu Apr 12 03:29:31 UTC 2018</spirit:value>
927927
</spirit:parameter>
928928
<spirit:parameter>
929929
<spirit:name>outputProductCRC</spirit:name>
930-
<spirit:value>7:89b371ff</spirit:value>
930+
<spirit:value>7:574ddaba</spirit:value>
931931
</spirit:parameter>
932932
</spirit:parameters>
933933
</spirit:view>
@@ -2842,7 +2842,7 @@
28422842
</spirit:modelParameter>
28432843
<spirit:modelParameter spirit:dataType="integer">
28442844
<spirit:name>C_FIFO_MODE</spirit:name>
2845-
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_FIFO_MODE">0</spirit:value>
2845+
<spirit:value spirit:format="long" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.C_FIFO_MODE">1</spirit:value>
28462846
</spirit:modelParameter>
28472847
<spirit:modelParameter spirit:dataType="integer">
28482848
<spirit:name>C_S_AXI_ACLK_RATIO</spirit:name>
@@ -3395,7 +3395,7 @@
33953395
<spirit:parameter>
33963396
<spirit:name>FIFO_MODE</spirit:name>
33973397
<spirit:displayName>Upsizer FIFO</spirit:displayName>
3398-
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.FIFO_MODE" spirit:choiceRef="choice_pairs_a4d18bae" spirit:order="10">0</spirit:value>
3398+
<spirit:value spirit:format="long" spirit:resolve="user" spirit:id="PARAM_VALUE.FIFO_MODE" spirit:choiceRef="choice_pairs_a4d18bae" spirit:order="10">1</spirit:value>
33993399
</spirit:parameter>
34003400
<spirit:parameter>
34013401
<spirit:name>ACLK_ASYNC</spirit:name>
@@ -3423,6 +3423,7 @@
34233423
<xilinx:coreRevision>12</xilinx:coreRevision>
34243424
<xilinx:configElementInfos>
34253425
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.ADDR_WIDTH" xilinx:valueSource="user"/>
3426+
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.FIFO_MODE" xilinx:valueSource="user"/>
34263427
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.MI_DATA_WIDTH" xilinx:valueSource="user"/>
34273428
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.SI_DATA_WIDTH" xilinx:valueSource="user"/>
34283429
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.SI_ID_WIDTH" xilinx:valueSource="user"/>

‎hdk/cl/developer_designs/cl_firesim/ip/axi_dwidth_converter_0/axi_dwidth_converter_0_ooc.xdc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# (c) Copyright 2012-2017 Xilinx, Inc. All rights reserved.
1+
# (c) Copyright 2012-2018 Xilinx, Inc. All rights reserved.
22
#
33
# This file contains confidential and proprietary information
44
# of Xilinx, Inc. and is protected under U.S. and

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