HardwareRegisterDescription

Goal of this site

On this page there are additional descriptions for software accessable registers within the hardware design. If you read this page proper there should be no use to take a look into any hardware desgin files. More abstract informations about all used hardware components can be found under /FPGA_Design/Garfield_Design/Garfield_system/Garfield_system.html The schematic within Documentation/Schematic give you informations about the physical connections outside of the FPGA.

Components

Garfield_ligthing

• this is a PIO QSYS component
• base addresses are generated when generating BSP

Bit	Name	Access	Reset Value	Description
0	LED_HL	RW	0	enable bit for light back left
1	LED_HR	RW	0	enable bit for light back right
2	LED_VL	RW	0	enable bit for light front left
3	LED_VR	RW	0	enable bit for light front right
7 ... 4	not accessable	-	-	-

Generic PWM_Generator

• a self writen (very simple) component
• can generating a 8-bit PWM Signal and has only one control register

Bit	Name	Access	Reset Value	Description
7 ... 0	control	RW	0	sets the duty cylce of the PWM signal generator
31 ... 7	-	R	0	not used

Instances

There are two instances of the PWM_Generator. The first is to control the driving speed of the car, the second one is for controlling the steering angle.

Rotary Encoder

• a self written component
• it counts the risign edges of the input and put out the result as a sum of all last edges

control register, Base address 0x00

Bit	Name	Access	Reset Value	Description
0	enable	RW	0	Enable bit for the core
1	clear	W	0	Clear bit. clears the result register and set it to 0; Must not be manually set to 0 after clearing. With the next rising edge of the clock it goes down on itself.
2	reset	W	0	Resets the whole core and set all values to default. At a read operation, it is always 0
15 ... 3	not accessable	-	0	-
16	error	R	0	Indicates an error within the counting process. You should reset the core!
31 ... 17	not accessable	-	0	-

result register, Base address 0x04

Bit	Name	Access	Reset Value	Description
31 ... 0	result	R	0	Result of the counting process