NMOS logic

Assumes familiarity with logic gates

The 6502 consists of about 4500 n-channel MOSFET transistors. Transistors can act as electronically controlled open-close switches. This simple property of transistors is incredibly useful for implementing digital logic, and is easy to reason about. But for complex transistor circuits like the 6502, it is sometimes necessary to understand the analog behavior of transistors beyond the digital switch model.

Analog operation

NMOS transistors have three terminals: source (S), drain (D) and gate (G). The current flowing through the source and drain is determined by the the voltages at the terminals. Ideally, no current flows into or out of the gate.

The voltage from gate to source is denoted Vgs. Vds is the drain-to-source voltage. Each transistor has a threshold voltage property Vth. The current characteristics of the NMOS transistor can be divided into 3 regions (or modes of operation):

• Cut-off/inactive region, when Vgs < Vth
  • No current flows
• Linear/triode region, when Vgs > Vth and Vds < Vgs - Vth
  • The current is determined by Vgs and Vds
  • For a constant Vgs, the current is almost proportional to Vds, approximating Ohm's law
• Saturation/active region, when Vgs > Vth and Vds > Vgs - Vth
  • The current is mostly determined by Vgs
  • For a constant Vgs, the current is mostly constant

In addition, all NMOS transistors have an intrinsic "body" diode. Current flows from source to drain through this diode in the unusual case of Vds < 0.

Digital operation

In digital circuits, there exists only two voltage levels: LOW (Vss/GND ground) and HIGH (Vdd). All wires in the circuit have capacitance, and a piece of wire is charged up to a HIGH voltage level (pulled up) by current flowing into the wire (propagating) from another HIGH-level wire. A wire is discharged down to LOW (pulled down) when current flows out of the wire to another LOW-level wire. If a piece of wire is only connected to other wires at the same voltage level, it will keep the same voltage level.

Typically all the NMOS transistors in the circuit will have a threshold voltage such that LOW < Vth < HIGH. This means that the NMOS transistors will only operate in the cut-off and saturation modes. Transistors which are part of logic gates typically have their source connected directly to LOW. In such a configuration, a HIGH level on the gate results in the transistor operating in saturation mode (as HIGH > Vth), essentially connecting the source and drain wires together, pulling the drain down to LOW.