mh_sha1_murmur3_x64_128: add assembly implementation with vector extension for riscv64#172
Draft
HeliC829 wants to merge 2 commits intointel:masterfrom
Draft
mh_sha1_murmur3_x64_128: add assembly implementation with vector extension for riscv64#172HeliC829 wants to merge 2 commits intointel:masterfrom
HeliC829 wants to merge 2 commits intointel:masterfrom
Conversation
… for riscv64 Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn>
…ementation with vector extension for riscv64 Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn>
62aa515 to
832ba19
Compare
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Depends on #168
This PR added an mh_sha1_murmur3_x64_128 assembly implementation with vector extension for riscv64.
Origin C implementation:
Assembly implementation with vector extension :