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Motorola SREC and Intel HEX file extraction support#544

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KendallHarterAtWork wants to merge 10 commits intomainfrom
srec-and-hex-support
Open

Motorola SREC and Intel HEX file extraction support#544
KendallHarterAtWork wants to merge 10 commits intomainfrom
srec-and-hex-support

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Summary

If merged this pull request will add support for extracting files from Motorola SREC and Intel HEX files into a user-specified directory. This address #257.

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github-actions bot commented Nov 17, 2025

🆕 New Folders (1)

  • binary

🧪 SBOM Results (2/17)

srectest_no1 (Link)

---
+++
@@ -38,6 +38,41 @@
       "supplementaryFiles": [],
       "vendor": [],
       "version": ""
+    },
+    {
+      "UUID": "39b66a99-f18e-40ee-b76d-146d4643dde4",
+      "captureTime": 1609459200,
+      "comments": "",
+      "components": [],
+      "containerPath": [],
+      "description": "",
+      "fileName": [
+        "HexFile.hex"
+      ],
+      "installPath": [
+        "/tmp/HexFile.hex/HexFile.hex"
+      ],
+      "md5": "079fd903dab17c8862d6de5ad802429e",
+      "metadata": [
+        {
+          "collectedBy": "Surfactant",
+          "collectionPlatform": "Linux-6.11.0-1018-azure-x86_64-with-glibc2.39",
+          "fileInfo": {
+            "hidden": false,
+            "mode": "-rw-r--r--"
+          }
+        }
+      ],
+      "name": null,
+      "provenance": null,
+      "recordedInstitution": null,
+      "relationshipAssertion": "Unknown",
+      "sha1": "7c92689f00a82e154bea6b59270b8416016b1762",
+      "sha256": "560edf62c61654fa40c06960c72480b61e85c5057452df337c998d0c155789e7",
+      "size": 100,
+      "supplementaryFiles": [],
+      "vendor": [],
+      "version": ""
     }
   ],
   "starRelationships": [],

binary (Link)

---
+++
@@ -0,0 +1,254 @@
+{
+  "analysisData": [],
+  "hardware": [],
+  "observations": [],
+  "relationships": [
+    {
+      "relationship": "Contains",
+      "xUUID": "39b66a99-f18e-40ee-b76d-146d4643dde4",
+      "yUUID": "b91c1fab-4e51-4c68-8014-10b9b6d36fec"
+    }
+  ],
+  "software": [
+    {
+      "UUID": "52f1e504-b79c-4e6d-b0d4-397882a55ee6",
+      "captureTime": 1609459200,
+      "comments": "",
+      "components": [],
+      "containerPath": [],
+      "description": "",
+      "fileName": [
+        "test.srec"
+      ],
+      "installPath": [
+        "/home/runner/work/Surfactant/Surfactant/tests/data/binary/test.srec"
+      ],
+      "md5": "8d945b70c74ae0bc0f9a87bc562fffba",
+      "metadata": [
+        {
+          "collectedBy": "Surfactant",
+          "collectionPlatform": "Linux-6.11.0-1018-azure-x86_64-with-glibc2.39",
+          "fileInfo": {
+            "hidden": false,
+            "mode": "-rw-r--r--"
+          }
+        }
+      ],
+      "name": null,
+      "provenance": null,
+      "recordedInstitution": null,
+      "relationshipAssertion": "Unknown",
+      "sha1": "5c6d627e2e4d881700af787171746eb1e4ae451f",
+      "sha256": "f85844d0cd99f80afdec5b839f189bf3b81c8d9229a918411ae180aac5406408",
+      "size": 28884,
+      "supplementaryFiles": [],
+      "vendor": [],
+      "version": ""
+    },
+    {
+      "UUID": "39b66a99-f18e-40ee-b76d-146d4643dde4",
+      "captureTime": 1609459200,
+      "comments": "This is a test file to create an msi.",
+      "components": [],
+      "containerPath": [],
+      "description": "",
+      "fileName": [
+        "test.msi",
+        "test.srec",
+        "test.hex"
+      ],
+      "installPath": [
+        "/home/runner/work/Surfactant/Surfactant/tests/data/binary/test.msi",
+        "/tmp/test.srec/test.srec",
+        "/tmp/test.hex/test.hex"
+      ],
+      "md5": "ebe91666b88d9acccbea8da417f22422",
+      "metadata": [
+        {
+          "collectedBy": "Surfactant",
+          "collectionPlatform": "Linux-6.11.0-1018-azure-x86_64-with-glibc2.39",
+          "fileInfo": {
+            "hidden": false,
+            "mode": "-rw-r--r--"
+          }
+        },
+        {
+          "ole": {
+            "author": "Test",
+            "clsid": "000c1084-0000-0000-c000-000000000046",
+            "clsid_type": "MSI",
+            "codepage": "1252",
+            "comments": "This is a test file to create an msi.",
+            "create_time": "2023-03-01 17:50:51",
+            "creating_application": "msitools 0.101",
+            "keywords": "Installer",
+            "last_saved_time": "2023-03-01 17:50:51",
+            "num_pages": "100",
+            "num_words": "2",
+            "revision_number": "{DAA384B0-26D7-4D34-B60E-B943AD4734F8}",
+            "security": "2",
+            "subject": "Testing Hello 1.0 Installer",
+            "template": "Intel;1033",
+            "title": "Installation Database"
+          }
+        }
+      ],
+      "name": "Testing Hello 1.0 Installer",
+      "provenance": null,
... and 157 more lines

For commit 976faec (Run 21600026990)
Compared against commit 294c1d8 (Run 20251316355)

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LGTM except for a few spots. I wonder if we should refactor this and the file decompression to compartmentalize the cache handling system?

Comment on lines +485 to +499
default_value = False
else:
# Have to convert from string to Boolean
default_value = default_value.lower() == "true"
self.value = self.__config_manager.get(self.plugin_name, self.info.name, default_value)
self.value = str(
self.__config_manager.get(self.plugin_name, self.info.name, default_value)
)
elif self.info.type_ == "int":
self.input_field = textual.widgets.Input(type="integer")
default_value = self.info.default
if default_value is None:
default_value = 0
self.value = str(
self.__config_manager.get(self.plugin_name, self.info.name, int(default_value))
)
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Should this TUI code be in a separate PR?

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I think it's fine here? If we try to move it into a separate PR we run into the issue that we'd also need to exclude the integer type from the srec/hex documentation. It's also a pretty small change.


def get_first_and_last_address(data: List[WriteInfo]) -> Tuple[int, int]:
# Arbitrarly large number so smaller addresses will always compare true
first_address = 2 << 65
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Probably fine? Feels wrong to have a magic number here.

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LGTM

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2 participants