LoongArch: Add vector calling convention support#113
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ChenghuiPan wants to merge 10000 commits intoloongson:dev/vecargfrom
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LoongArch: Add vector calling convention support#113ChenghuiPan wants to merge 10000 commits intoloongson:dev/vecargfrom
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libstdc++-v3/ChangeLog: * include/bits/ptr_traits.h (to_address): Use markdown for formatting in Doxygen comments.
Testcases for musttail call optimization fail on pru-unknown-elf: FAIL: c-c++-common/musttail14.c -std=gnu++17 (test for excess errors) Excess errors: .../gcc/gcc/testsuite/c-c++-common/musttail14.c:37:14: error: cannot tail-call: caller uses sjlj exceptions Silence these errors by disabling the tests if target uses SJLJ for implementing exceptions. Use a new effective target check for this. Ensured that test results with and without this patch for x86_64-pc-linux-gnu are the same. gcc/ChangeLog: * doc/sourcebuild.texi: Document effective target using_sjlj_exceptions. gcc/testsuite/ChangeLog: * c-c++-common/musttail14.c: Disable test if effective target using_sjlj_exceptions. * c-c++-common/musttail22.c: Ditto. * g++.dg/musttail8.C: Ditto. * g++.dg/musttail9.C: Ditto. * g++.dg/opt/musttail3.C: Ditto. * g++.dg/opt/musttail4.C: Ditto. * g++.dg/opt/musttail5.C: Ditto. * g++.dg/opt/pr119613.C: Ditto. * lib/target-supports.exp (check_effective_target_using_sjlj_exceptions): New check. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
Some backends do not define TARGET_ASM_OUTPUT_MI_THUNK. But the generic thunk support cannot emit code for calling variadic methods of multiple-inheritance classes. Example error for pru-unknown-elf: .../gcc/gcc/testsuite/g++.dg/ipa/pr83549.C:7:24: error: generic thunk code fails for method 'virtual void C::_ZThn4_N1C3fooEz(...)' which uses '...' Disable the affected tests for all targets which do not define TARGET_ASM_OUTPUT_MI_THUNK. Ensured that test results with and without this patch for x86_64-pc-linux-gnu are the same. gcc/ChangeLog: * doc/sourcebuild.texi: Document variadic_mi_thunk effective target check. gcc/testsuite/ChangeLog: * g++.dg/ipa/pr83549.C: Require effective target variadic_mi_thunk. * g++.dg/ipa/pr83667.C: Ditto. * g++.dg/torture/pr81812.C: Ditto. * g++.old-deja/g++.jason/thunk3.C: Ditto. * lib/target-supports.exp (check_effective_target_variadic_mi_thunk): New function. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
… CST) This adds the simplification of a ZERO_EXTEND of an AND. This optimization was already handled in combine via combine_simplify_rtx and the handling there of compound_operations (ZERO_EXTRACT). Build and tested for aarch64-linux-gnu. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * simplify-rtx.cc (simplify_context::simplify_unary_operation_1) <case ZERO_EXTEND>: Add simplifcation for and with a constant. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
This patch marks m32c*-*-* targets obsolete in GCC 16. The target has not had a maintainer since GCC 9, and fails to compile even the simplest of functions since GCC 8 (reported in PR83670). contrib/ChangeLog: * config-list.mk: Add m32c*-*-* to the list of obsoleted targets. gcc/ChangeLog: * config.gcc (LIST): --enable-obsolete for m32c-elf.
I introduced a bug by last minute cleanups unifying the scalar and vector SSE conditional. This patch fixes it and restores cost of 1 of SSE scalar MIN/MAX Bootstrapped/regtested x86_64-linux, comitted. gcc/ChangeLog: PR target/105275 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Fix cost of FP scalar MAX_EXPR and MIN_EXPR
gcc/ChangeLog: PR target/119549 * common/config/i386/i386-common.cc (ix86_handle_option): Refactor msse4 and mno-sse4. * config/i386/i386.opt (msse4): Remove RejectNegative. (mno-sse4): Remove the entry. * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p): Remove special code which handles mno-sse4.
Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vec_duplicate will be extracted into expand_const_vec_duplicate. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Extract const vec_duplicate into separated function. (expand_const_vec_duplicate): Add new func to take care of the const vec_duplicate. Signed-off-by: Pan Li <pan2.li@intel.com>
Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vec_series will be extracted into expand_const_vec_series. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vec_series): Add new func to take care of the const vec_series. (expand_const_vector): Extract const vec_series into separated function. Signed-off-by: Pan Li <pan2.li@intel.com>
Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vector duplicate will be extracted into expand_const_vector_duplicate, and then expand_const_vector_duplicate_repeating and expand_const_vector_duplicate_default for the underlying function. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector_duplicate_repeating): Add new func to take care of vector duplicate with repeating. (expand_const_vector_duplicate_default): Add new func to take care of default const vector duplicate. (expand_const_vector_duplicate): Add new func to take care of all const vector duplicate. (expand_const_vector): Extract const vector duplicate into separated function. Signed-off-by: Pan Li <pan2.li@intel.com>
Consider the expand_const_vector is quit long (about 500 lines) and complicated, we would like to extract the different case into different functions. For example, the const vector stepped will be extracted into expand_const_vector_stepped. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_const_vector): Extract const vector stepped into separated func. (expand_const_vector_single_step_npatterns): Add new func to take care of single step. (expand_const_vector_interleaved_stepped_npatterns): Add new func to take care of interleaved step. (expand_const_vector_stepped): Add new func to take care of const vector stepped. Signed-off-by: Pan Li <pan2.li@intel.com>
Promote integer arguments smaller than int if TARGET_PROMOTE_PROTOTYPES returns true. gcc/ PR middle-end/112877 * calls.cc (initialize_argument_information): Promote small integer arguments if TARGET_PROMOTE_PROTOTYPES returns true. gcc/testsuite/ PR middle-end/112877 * gfortran.dg/pr112877-1.f90: New test. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Remove the targetm.calls.promote_prototypes call from C, C++ and Ada frontends. gcc/ PR c/48274 PR middle-end/112877 PR middle-end/118288 * gimple.cc (gimple_builtin_call_types_compatible_p): Remove the targetm.calls.promote_prototypes call. * tree.cc (tree_builtin_call_types_compatible_p): Likewise. gcc/ada/ PR middle-end/112877 * gcc-interface/utils.cc (create_param_decl): Remove the targetm.calls.promote_prototypes call. gcc/c/ PR c/48274 PR middle-end/112877 PR middle-end/118288 * c-decl.cc (start_decl): Remove the targetm.calls.promote_prototypes call. (store_parm_decls_oldstyle): Likewise. (finish_function): Likewise. * c-typeck.cc (convert_argument): Likewise. (c_safe_arg_type_equiv_p): Likewise. gcc/cp/ PR middle-end/112877 * call.cc (type_passed_as): Remove the targetm.calls.promote_prototypes call. (convert_for_arg_passing): Likewise. * typeck.cc (cxx_safe_arg_type_equiv_p): Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Since the C frontend no longer promotes integer argument smaller than int, the apx-ndd.c codgen is slightly different: apx-ndd.s (original) 2024-11-10 06:07:09.894876973 +0800 apx-ndd.s (updated) 2024-11-10 06:06:59.371860565 +0800 @@ -17,7 +17,7 @@ foo_add_char: foo1_add_char: .LFB1: .cfi_startproc - leal (%rsi,%rdi), %eax + leal (%rdi,%rsi), %eax ret .cfi_endproc .LFE1: @@ -50,7 +50,7 @@ foo_add_short: foo1_add_short: .LFB4: .cfi_startproc - leal (%rsi,%rdi), %eax + leal (%rdi,%rsi), %eax ret .cfi_endproc .LFE4: @@ -413,7 +413,7 @@ foo_and_char: foo1_and_char: .LFB37: .cfi_startproc - andl %edi, %esi, %eax + andl %esi, %edi, %eax ret .cfi_endproc .LFE37: @@ -435,7 +435,7 @@ foo_and_short: foo1_and_short: .LFB39: .cfi_startproc - andl %edi, %esi, %eax + andl %esi, %edi, %eax ret .cfi_endproc .LFE39: @@ -501,7 +501,7 @@ foo_or_char: foo1_or_char: .LFB45: .cfi_startproc - orl %edi, %esi, %eax + orl %esi, %edi, %eax ret .cfi_endproc .LFE45: @@ -523,7 +523,7 @@ foo_or_short: foo1_or_short: .LFB47: .cfi_startproc - orl %edi, %esi, %eax + orl %esi, %edi, %eax ret .cfi_endproc .LFE47: @@ -589,7 +589,7 @@ foo_xor_char: foo1_xor_char: .LFB53: .cfi_startproc - xorl %edi, %esi, %eax + xorl %esi, %edi, %eax ret .cfi_endproc .LFE53: @@ -611,7 +611,7 @@ foo_xor_short: foo1_xor_short: .LFB55: .cfi_startproc - xorl %edi, %esi, %eax + xorl %esi, %edi, %eax ret .cfi_endproc .LFE55: @@ -1018,7 +1018,7 @@ foo4_rol_uint64_t: foo1_imul_short: .LFB92: .cfi_startproc - imull %edi, %esi, %eax + imull %esi, %edi, %eax ret .cfi_endproc .LFE92: Adjust the assembler scans. PR middle-end/112877 * gcc.target/i386/apx-ndd.c: Adjusted. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Since the C frontend no longer promotes char and short arguments, expect in-branch clones for x86. PR middle-end/112877 * gcc.dg/vect/vect-simd-clone-16c.c: Expect in-branch clones for x86. * gcc.dg/vect/vect-simd-clone-16d.c: Likewise. * gcc.dg/vect/vect-simd-clone-17c.c: Likewise. * gcc.dg/vect/vect-simd-clone-17d.c: Likewise. * gcc.dg/vect/vect-simd-clone-18c.c: Likewise. * gcc.dg/vect/vect-simd-clone-18d.c: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Since the C frontend no longer promotes char argument, enable scev-cast.c for all targets and adjust scan matches. PR middle-end/112877 * gcc.dg/tree-ssa/scev-cast.c: Enable for all targets and adjust scan match. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Since the C frontend no longer promotes char argument, enable ssa-fre-4.c for all targets and adjust scan match. PR middle-end/112877 * gcc.dg/tree-ssa/ssa-fre-4.c: Enable for all targets and adjust scan match. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
An instantiated friend function relies on DECL_FRIEND_CONTEXT being set to be able to recover the template arguments of the class that instantiated it, despite not being a template itself. This patch ensures that this data is streamed even when DECL_CLASS_SCOPE_P is not true. PR c++/119939 gcc/cp/ChangeLog: * module.cc (trees_out::lang_decl_vals): Also stream lang->u.fn.context when DECL_UNIQUE_FRIEND_P. (trees_in::lang_decl_vals): Likewise. gcc/testsuite/ChangeLog: * g++.dg/modules/concept-11_a.H: New test. * g++.dg/modules/concept-11_b.C: New test. Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Use __SIZE_TYPE__ for size_t types so that it works for llp64. Signed-off-by: Jonathan Yong <10walls@gmail.com> gcc/testsuite/ChangeLog: * gcc.dg/graphite/id-15.c: Use __SIZE_TYPE__ instead of unsigned long. * gcc.dg/plugin/infoleak-net-ethtool-ioctl.c: ditto.
…f SSE For Windows x86-32 targets, the Microsoft ABI only guarantees that the stack is aligned to 4-byte boundaries. GCC knows about the default alignment of the stack. However, before this commit, it did not realign the stack unless SSE was also enabled. When a stricter (larger) alignment is requested, it's always necessary to realign the stack, as what Solaris does. Reference: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111107#c14 Signed-off-by: LIU Hao <lh_mouse@126.com> Signed-off-by: Jonathan Yong <10walls@gmail.com> gcc/ChangeLog: PR target/111107 * config/i386/cygming.h (STACK_REALIGN_DEFAULT): Copy from sol2.h.
The warning for -Wunknown-pragmas is issued at the location provided by
libcpp to the def_pragma() callback. This location is
cpp_reader::directive_line, which is a location for the start of the line
only; it is also not a valid location in case the unknown pragma was lexed
from a _Pragma string. These factors make it impossible to suppress
-Wunknown-pragmas via _Pragma("GCC diagnostic...") directives on the same
source line, as in the PR and the test case. Address that by issuing the
warning at a better location returned by cpp_get_diagnostic_override_loc().
libcpp already maintains this location to handle _Pragma-related diagnostics
internally; it was needed also to make a publicly accessible version of it.
gcc/c-family/ChangeLog:
PR c/118838
* c-lex.cc (cb_def_pragma): Call cpp_get_diagnostic_override_loc()
to get a valid location at which to issue -Wunknown-pragmas, in case
it was triggered from a _Pragma.
libcpp/ChangeLog:
PR c/118838
* errors.cc (cpp_get_diagnostic_override_loc): New function.
* include/cpplib.h (cpp_get_diagnostic_override_loc): Declare.
gcc/testsuite/ChangeLog:
PR c/118838
* c-c++-common/cpp/pragma-diagnostic-loc-2.c: New test.
* g++.dg/gomp/macro-4.C: Adjust expected output.
* gcc.dg/gomp/macro-4.c: Likewise.
* gcc.dg/cpp/Wunknown-pragmas-1.c: Likewise.
Here is a patch to improve the tail recursion handling also for non-musttail calls. 2025-04-28 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/119493 * tree-tailcall.cc (find_tail_calls): Handle non-gimple_reg_type arguments which aren't just passed through for tail recursions even for non-musttail calls.
This is a patch from late 2024 (just before stage1 freeze), but I never pushed hard to the change, and thus never integrated it. It's mostly unchanged except for updating insn in the hash table after finding an optimizable case. We were holding the deleted insn in the hash table rather than the new insn. Just something I noticed recently. Bootstrapped and regression tested on my BPI and regression tested riscv32-elf and riscv64-elf configurations. We've used this since November internally, so it's well exercised on spec as well. gcc/ * config.gcc (riscv): Add riscv-vect-permcost.o to extra_objs. * config/riscv/riscv-passes.def (pass_vector_permcost): Add new pass. * config/riscv/riscv-protos.h (make_pass_vector_permconst): Declare. * config/riscv/riscv-vect-permconst.cc: New file. * config/riscv/t-riscv: Add build rule for riscv-vect-permcost.o
…d calculations. This commit includes changes to exception handling, and changes to the calculations for offsets and lengths when processing subscripted table entries and variables with (from:length) reference modifications. Exception handling in COBOL requires significant amounts of information to be built at compile time and sent to libgcobol.so at run time. The changes here reduce some problems caused by creating structures by the host that are processed by the target, mainly by creating arrays of simple integers rather than by turning a structure into a stream of bytes. Significant changes to the logic of exception handling brings the run-time performance more in line with the ISO specification. The handling of COBOL variables that include tables defined with DEPENDING ON clauses is subtly different when used as sending variables versus when they are receiving variables. This commit folds the very similar refer_offset_source and refer_offset_dest routines into a single refer_offset routine. It also streamlines the refer_length_source and refer_length_dest routines by moving common code into a static refer_length() routine, and having refer_length_source() and refer_length_dest() each call refer_length() with a a type flag. Co-Authored by: James K. Lowden <jklowden@cobolworx.com> Co-Authored by: Robert Dubner <rdubner@symas.com> gcc/cobol/ChangeLog: * cdf.y: Exceptions. * except.cc (cbl_enabled_exception_t::dump): Likewise. (cbl_enabled_exceptions_t::dump): Likewise. (cbl_enabled_exceptions_t::status): Likewise. (cbl_enabled_exceptions_t::encode): Likewise. (cbl_enabled_exceptions_t::turn_on_off): Likewise. (cbl_enabled_exceptions_t::match): Likewise. (declarative_runtime_match): Likewise. Likewise. * exceptg.h (struct cbl_exception_files_t): Likewise. (class exception_turn_t): Likewise. (apply_cdf_turn): Likewise. * genapi.cc (treeplet_fill_source): Use refer_offset(). (function_handle_from_name): Likewise. (parser_initialize_programs): Likewise. (parser_statement_begin): Likewise. (array_of_long_long): Exceptions. (parser_compile_ecs): Exceptions. (parser_compile_dcls): Exceptions. (store_location_stuff): Exceptions. (initialize_variable_internal): Use refer_offset(). (compare_binary_binary): Use refer_offset(). (cobol_compare): Use refer_offset(). (paragraph_label): Formatting. (parser_goto): Use refer_offset(). (parser_perform_times): Likewise. (internal_perform_through_times): Likewise. (parser_enter_file): Exceptions. (psa_FldLiteralN): Add comment. (parser_accept): Use refer_offset(). (parser_accept_command_line): Likewise. (parser_accept_command_line_count): Likewise. (parser_accept_envar): Likewise. (parser_set_envar): Likewise. (parser_display_internal): Likewise. (parser_initialize_table): Likewise. (parser_sleep): Likewise. (parser_allocate): Likewise. (parser_free): Likewise. (parser_division): Likewise. (parser_relop_long): Likewise. (parser_see_stop_run): Likewise. (parser_classify): Likewise. (parser_file_add): Include symbol_table_index in __gg__file_init(). (parser_file_open): Use refer_offset(). (parser_file_write): Move forward declaration of store_location_stuff(). (parser_file_start): Use refer_offset(). (parser_inspect_conv): Likewise: (parser_intrinsic_numval_c): Likewise: (parser_intrinsic_subst): Likewise: (parser_intrinsic_call_1): Likewise: (parser_intrinsic_call_2): Likewise: (parser_intrinsic_call_3): Likewise: (parser_intrinsic_call_4): Likewise: (parser_sort): Likewise: (parser_return_start): Exceptions. (parser_unstring): Use refer_offset(). (create_and_call): Likewise. (parser_set_pointers): Use refer_offset(). (parser_program_hierarchy): Comment. (parser_set_handled): Exceptions; removed. (parser_set_file_number): Exceptions; removed. (stash_exceptions): Exceptions; removed. (parser_exception_prepare): Exceptions; removed. (parser_match_exception): Exceptions; eliminate blob. (parser_check_fatal_exception): Exceptions. (parser_push_exception): Create. (parser_pop_exception): Create. (mh_identical): Use refer_offset(). (mh_source_is_literalN): Likewise. (mh_dest_is_float): Likewise. (mh_numeric_display): Likewise. (mh_little_endian): Likewise. (mh_source_is_group): Likewise. (move_helper): Likewise. (binary_initial_from_float128): Formatting; change error message. (initial_from_float128): Change name to "initial_from_initial" (initial_from_initial): Add one byte to allocation for figconsts. (parser_symbol_add): Use initial_from_initial(). (parser_symbol_add): Eliminate unneeded logic around actually_create... * genapi.h: Exceptions. * genmath.cc (fast_add): Use refer_offset(). (fast_subtract): Likewise. (fast_multiply): Likewise. (fast_divide): Likewise. * genutil.cc: Exceptions; various global definitions. (get_integer_value): Comment. (get_data_offset_dest): Eliminate. (get_data_offset_source): Rename to get_data_offset(). (get_data_offset): Use refer_offset(). (get_binary_value): Likewise; eliminate use of literal_decl_node. (build_array_of_treeplets): Likewise. (build_array_of_fourplets): Likewise. (REFER_CHECK): Comment: (refer_refmod_length): Use get_any_capacity(); use refer_offset; set reflen to integer_one_node. (refer_offset_dest): Change name to refer_offset. (refer_offset): Use get_data_offset(). (refer_size_dest): Change name to refer_size(). (refer_size): Use get_any_capacity(). (refer_offset_source): Use refer_offset(). (refer_size_source): Likewise. (qualified_data_source): Likewise. (qualified_data_dest): Likewise. (qualified_data_location): Likewise. * genutil.h: Exceptions; changes to global declarations. * lexio.cc (likely_nist_file): Added to detect NIST file format. (cdftext::free_form_reference_format): Handle NIST file format. * parse.y: (strip_trailing_zeroes): Added. Changes for exceptions. * parse_ante.h (parse_error_inc): Likewise. (YYLLOC_DEFAULT): Likewise. (static_cast): Likewise. (is_cobol_word): Change to is_cobol_charset. (is_cobol_charset): Refine allowed characters. (require_numeric): Change to require integer. (require_integer): Likewise. (current_enabled_ecs): Exceptions. (is_integer_literal): Change interpretation. (procedure_division_ready): Exceptions. (statement_epilog): Likewise. (statement_begin): Likewise. * show_parse.h: Changes to GCOBOL_SHOW handling. * structs.cc: Add symbol_index to cblc_file_t structure. * symbols.cc (field_str): Repair .initial handling in FldLiteralN. * symbols.h (struct cbl_field_t): Eliminate literal_decl_node. (current_enabled_ecs): Exceptions. * util.cc (cbl_message): Add final newline to error message. (ftoupper): Added. (iso_cobol_word): Add list of ISO reserved words. * util.h (ftoupper): Added. libgcobol/ChangeLog: * charmaps.cc: Add #include <vector>. * common-defs.h (COMMON_DEFS_H_): Add #include <stdio.h>. (enum cbl_file_mode_t): Add file_mode_any_e. (enum file_stmt_t): Created. (cbl_file_mode_str): Add case for file_mode_any_e. (ec_cmp): Exceptions. (struct cbl_enabled_exception_t): Likewise. (struct cbl_declarative_t): Likewise. (class cbl_enabled_exceptions_array_t): Likewise. (class cbl_enabled_exceptions_t): Likewise. (struct cbl_enabled_exceptions_array_t): Likewise. (enabled_exception_match): Likewise. * constants.cc: Add #include <vector>. * exceptl.h (struct cbl_exception_t): Removed. (struct cbl_declarative_t): Removed. (class ec_status_t): Removed. * gcobolio.h: Add symbol_table_index to cblc_file_t. * gfileio.cc: Add #include <vector> (establish_status): Comment. (__io__file_init): Handle symbol_table_index. (__io__file_delete): Set file->prior_op. (__io__file_rewrite): Likewise. (__io__file_read): Likewise. (__io__file_open): Likewise. (__io__file_close): Likewise. * gmath.cc: Include #include <vector>. * intrinsic.cc: Include #include <vector>. * libgcobol.cc: Multiple modifications for exceptions. * valconv.cc: #include <vector>.
Tweak the formatting of the genrvv-type-indexer.cc file to conform to the style used by clang-format. This is a no-functional-change commit that only modifies the formatting of the code. gcc/Changelog: * config/riscv/genrvv-type-indexer.cc: Apply clang-format to the file.
I've noticed a typo on the flag name, fixed thusly. 2025-05-05 Jakub Jelinek <jakub@redhat.com> * config/i386/i386.md (truncsfbf2): Fix comment typo, unsafte -> unsafe.
Require the linker plugin so functions are properly detected as unused when inlined. PR testsuite/120084 * gcc.dg/lto/pr60779_0.c: Require linker-plugin.
…nhibited warning [PR118163,PR118392]
Those 2 PRs show that even when using a *single* diagnostic_group, it's
possible to end up with a warning being inhibited and its associated
note still emitted, which leads to puzzling user experience. Example
from PR118392:
===
$ gcc/cc1plus inhibit-warn-3.C -w
inhibit-warn-3.C:10:17: note: only here as a ‘friend’
10 | friend void bar();
| ^~~
===
Following a suggestion from ppalka@, this patch keeps track of the
"diagnostic depth" at which a warning in inhibited, and makes sure that
all subsequent notes at that depth or deeper are inhibited as well,
until a subsequent warning or error is accepted at that depth, or the
diagnostic_group or nesting level is popped.
PR c++/118163
PR c++/118392
gcc/ChangeLog:
* diagnostic.cc (diagnostic_context::initialize): Initialize
m_diagnostic_groups.m_inhibiting_notes_from.
(diagnostic_context::inhibit_notes_in_group): New.
(diagnostic_context::notes_inhibited_in_group): New
(diagnostic_context::report_diagnostic): Call
inhibit_notes_in_group and notes_inhibited_in_group.
(diagnostic_context::end_group): Call inhibit_notes_in_group.
(diagnostic_context::pop_nesting_level): Ditto.
* diagnostic.h (diagnostic_context::m_diagnostic_groups): Add
member to track the depth at which a warning has been inhibited.
(diagnostic_context::notes_inhibited_in_group): Declare.
(diagnostic_context::inhibit_notes_in_group): Declare.
* doc/ux.texi: Document diagnostic_group behavior with regards
to inhibited warnings.
gcc/testsuite/ChangeLog:
* g++.dg/diagnostic/incomplete-type-2.C: New test.
* g++.dg/diagnostic/incomplete-type-2a.C: New test.
* g++.dg/diagnostic/inhibit-warn-3.C: New test.
Fix-up for commit 8d84ea2 "OpenMP, GCN: Add interop-hsa testcase", which added 'libgomp.c/interop-hsa.c'. If nvptx offloading compilation is enabled in addition to GCN, the former ICEs: during RTL pass: final [...]/libgomp.c/interop-hsa.c: In function 'get_kernel_ptr': [...]/libgomp.c/interop-hsa.c:34:1: internal compiler error: RTL check: expected code 'subreg', have 'reg' in nvptx_print_operand, at config/nvptx/nvptx.cc:3082 0x1ccdb96 internal_error(char const*, ...) [...]/gcc/diagnostic-global-context.cc:517 0x7446c3 rtl_check_failed_code1(rtx_def const*, rtx_code, char const*, int, char const*) [...]/gcc/rtl.cc:770 0x7fa533 nvptx_print_operand [...]/gcc/config/nvptx/nvptx.cc:3082 0xb25f34 output_operand(rtx_def*, int) [...]/gcc/final.cc:3641 0xb26f07 output_asm_insn(char const*, rtx_def**) [...]/gcc/final.cc:3534 0xb29d91 output_asm_insn(char const*, rtx_def**) [...]/gcc/final.cc:2639 0xb29d91 final_scan_insn_1 [...]/gcc/final.cc:2642 0xb2a59f final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*) [...]/gcc/final.cc:2892 0xb2a68c final_1 [...]/gcc/final.cc:1983 0xb2b378 rest_of_handle_final [...]/gcc/final.cc:4250 0xb2b378 execute [...]/gcc/final.cc:4328 Regardless of the issue that nvptx offloading compilation probably shouldn't ICE, the 'asm' insert clearly is valid for GCN only. libgomp/ * testsuite/libgomp.c/interop-hsa.c: GCN offloading only.
…rget selector syntax Fix-up for commit f9f81d5 "vect-simd-clone-1[6-8][cd].c: Expect in-branch clones for x86", where we lost the relevant testing, for example, for x86_64, or GCN: PASS: gcc.dg/vect/vect-simd-clone-16c.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-16c.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-16c.c execution test -PASS: gcc.dg/vect/vect-simd-clone-16c.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 PASS: gcc.dg/vect/vect-simd-clone-16d.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-16d.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-16d.c execution test -PASS: gcc.dg/vect/vect-simd-clone-16d.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 PASS: gcc.dg/vect/vect-simd-clone-17c.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-17c.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-17c.c execution test -PASS: gcc.dg/vect/vect-simd-clone-17c.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 PASS: gcc.dg/vect/vect-simd-clone-17d.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-17d.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-17d.c execution test -PASS: gcc.dg/vect/vect-simd-clone-17d.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 PASS: gcc.dg/vect/vect-simd-clone-18c.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-18c.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-18c.c execution test -PASS: gcc.dg/vect/vect-simd-clone-18c.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 PASS: gcc.dg/vect/vect-simd-clone-18d.c (test for excess errors) UNSUPPORTED: gcc.dg/vect/vect-simd-clone-18d.c -flto -ffat-lto-objects PASS: gcc.dg/vect/vect-simd-clone-18d.c execution test -PASS: gcc.dg/vect/vect-simd-clone-18d.c scan-tree-dump-times vect "[\\n\\r] [^\\n]* = foo\\.simdclone" 0 ..., which this commit restores. PR middle-end/112877 gcc/testsuite/ * gcc.dg/vect/vect-simd-clone-16c.c: Fix target selector syntax. * gcc.dg/vect/vect-simd-clone-16d.c: Likewise. * gcc.dg/vect/vect-simd-clone-17c.c: Likewise. * gcc.dg/vect/vect-simd-clone-17d.c: Likewise. * gcc.dg/vect/vect-simd-clone-18c.c: Likewise. * gcc.dg/vect/vect-simd-clone-18d.c: Likewise.
I noticed while investigating PR c++/119437 that r8-2724-g88b811bd290630 removed parsing_default_capturing_generic_lambda_in_template but not its prototype in cp-tree.h. This patch fixes this. gcc/cp/ChangeLog: * cp-tree.h (parsing_default_capturing_generic_lambda_in_template): Remove obsolete prototype.
This is a (benign) assertion failure on the mainline for the new Finalizable aspect put on a tagged record type when not all the primitives are declared. This compiles and runs on the 15 branch because assertions are disabled. gcc/ada/ PR ada/120104 * exp_ch3.adb (Expand_Freeze_Record_Type): For a controlled tagged type, freeze only the controlled primitives that are present. gcc/testsuite/ * gnat.dg/specs/finalizable1.ads: New test.
2025-05-05 John David Anglin <danglin@gcc.gnu.org> gcc/testsuite/ChangeLog: PR testsuite/120085 * gcc.dg/lto/modref-2_0.c: Link test with libm.
…r_in_expr
For a debugger to display statically-allocated[0] TLS variables the compiler
must communicate information[1] that can be used in conjunction with knowledge
of the runtime enviroment[2] to calculate a location for the variable for
each thread. That need gives rise to dw_loc_dtprel in dwarf2out, a flag tracking
whether the location description is dtprel, or relative to the
"dynamic thread pointer". Location descriptions in the .debug_info section for
TLS variables need to be relocated by the static linker accordingly, and
dw_loc_dtprel controls emission of the needed relocations.
This is further complicated by -gsplit-dwarf. -gsplit-dwarf is designed to allow
as much debugging information as possible to bypass the static linker to improve
linking performance. One of the ways that is done is by introducing a layer of
indirection for relocatable values[3]. That gives rise to addr_index_table which
ultimately results in the .debug_addr section.
While the code handling addr_index_table clearly contemplates the existence of
dtprel entries[4] resolve_addr_in_expr does not, and the result is that when
using -gsplit-dwarf the DWARF for TLS variables contains an address[5] rather
than an offset, and debuggers can't work with that.
This is visible on a trivial example. Compile
```
static __thread int tls_var;
int main(void) {
tls_var = 42;
return 0;
}
```
with -g and -g -gsplit-dwarf. Run the program under gdb. When examining the
value of tls_var before and after the assignment, -g behaves as one would
expect but -g -gsplit-dwarf does not. If the user is lucky and the miscalculated
address is not mapped, gdb will print "Cannot access memory at address ...".
If the user is unlucky and the miscalculated address is mapped, gdb will simply
give the wrong value. You can further confirm that the issue is the address
calculation by asking gdb for the address of tls_var and comparing that to what
one would expect.[6]
Thankfully this is trivial to fix by modifying resolve_addr_in_expr to propagate
the dtprel character of the location where necessary. gdb begins working as
expected and the diff in the generated assembly is clear.
```
.section .debug_addr,"",@progbits
.long 0x14
.value 0x5
.byte 0x8
.byte 0
.Ldebug_addr0:
- .quad tls_var
+ .long tls_var@dtpoff, 0
.quad .LFB0
```
[0] Referring to e.g. __thread as statically-allocated vs. e.g. a
dynamically-allocated pthread_key_create() call.
[1] Generally an offset in a TLS block.
[2] With glibc, provided by libthread_db.so.
[3] Relocatable values are moved to a table in the .debug_addr section, those
values in .debug_info are replaced with special values that look up indexes
in that table, and then the static linker elsewhere assigns a single per-CU
starting index in the .debug_addr section, allowing those special values to
remain permanently fixed and the resulting data to be ignored by the linker.
[4] ate_kind_rtx_dtprel exists, after all, and new_addr_loc_descr does produce
it where appropriate.
[5] e.g. an address in the .tbss/.tdata section.
[6] e.g. on x86-64 by examining %fsbase and the offset in the assembly
2025-05-01 Kyle Huey <khuey@kylehuey.com>
* dwarf2out.cc (resolve_addr_in_expr): Propagate dtprel into the address
table when appropriate.
gcc/testsuite/ChangeLog: PR target/120054 * gcc.target/riscv/predef-19.c: Adjust testcase.
When applying a bitmask to reflect ranges, it is sometimes deferred and this can result in an UNDEFINED result. IPA is not expecting this, and add a check for it, and convert to VARYING if encountered. PR tree-optimization/120048 gcc/ * ipa-cp.cc (ipcp_store_vr_results): Check for UNDEFINED. gcc/testsuite/ * gcc.dg/pr120048.c: New.
…d set type The ICE occurred because of a bug in M2GenGCC.mod:FoldBecomes which attempted to remove the same quadruple twice. Thereafter cc1gm2 generated an erroneous error type error as PCSymBuild did not skip an aliased set type. The type of the const was set incorrectly (as a set type) rather than the type of the set element. gcc/m2/ChangeLog: PR modula2/120117 * gm2-compiler/M2GenGCC.mod (FoldBecomes): Remove the call to RemoveQuad since this is performed by TypeCheckBecomes. * gm2-compiler/PCSymBuild.mod (buildConstFunction): Rewrite header comment. Check for a set or a type aliased set and appropriately skip type equivalences and obtain the element type. * gm2-compiler/SymbolTable.mod (PutConst): Add call to CheckBreak. gcc/testsuite/ChangeLog: PR modula2/120117 * gm2/pim/pass/highbit.mod: New test. * gm2/pim/pass/highbit2.mod: New test. Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Some assemblers do not support MOVS instructions with explicit operands. Emit instruction with implicit operands, but prefix the instruction with a segment override prefix if the memory operand refers to ADDR_SPACE_SEG_FS or ADDR_SPACE_SEG_GS named address space. PR target/120019 gcc/ChangeLog: * config/i386/i386.cc (ix86_print_operand): Handle 'v' operand modifier to emit segment override prefix. * config/i386/i386.md (*strmovdi_rex_1): Use %v operand modifier to emit segment override prefix. (*strmovsi_1): Ditto. (*strmovhi_1): Ditto. (*strmovqi_1): Ditto. (*rep_movdi_rex64): Ditto. (*rep_movsi): Ditto. (*rep_movqi): Ditto. gcc/testsuite/ChangeLog: * gcc.target/i386/pr111657-1.c (dg-do): Change to "assemble". (dg-options): Remove -masm=att and add -save-temps. (dg-final): Update scan-assembler and scan-assembler-not strings. Co-authored-by: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
As is outlined in the PR, we have a few define_insn_and_split patterns which optimize away explicit masking of shift/bit positions when the masking matches what the hardware's behavior. A small number of those define_insn_and_split patterns generate a single instruction. It's fairly elegant in that we were essentially just rewriting the RTL to match an existing pattern. In one case we'd do the rewriting and later turn a 32bit shift into a bset. That's not safe because the masking of a 32bit shift uses 0x1f while masking on bset uses 0x3f on rv64. The net was incorrect code as seen in the BZ entry. The fix is pretty simple. There's no real reason we need to use a define_insn_and_split. It was just convenient. Instead we can use a simple define_insn. That avoids a change in the masking behavior for the shift count/bit position and the masking stays in the RTL. I quickly scanned the entire port and didn't see any additional define_insn_and_splits that obviously generated a single instruction outside the shift/rotate space, though in the vector space that's nontrivial to ascertain. This was been run through my tester for the cross configurations, but not the native bootstrap/regression test (yet). PR target/119971 gcc/ * config/riscv/bitmanip.md (rotation with masked count): Rewrite as define_insn patterns. Fix formatting. * config/riscv/riscv.md (shift with masked count): Similarly. gcc/testsuite * gcc.target/riscv/pr119971.c: New test. * gcc.target/riscv/zbb-rol-ror-03.c: Adjust test slightly.
This bootstraps with some test failures but works well enough to build 11..15. libphobos/ChangeLog: * configure.tgt: Add sparc64-unknown-linux-gnu as a supported target.
Fix udr-sve.c target test that to check for the correct results based on the OpenMP clauses used. The test was first written with a misunderstood functionality of the reduction clause. Tested with aarch64-linux-gnu. OK for trunk? libgomp/ChangeLog: * testsuite/libgomp.c-target/aarch64/udr-sve.c: Fix test.
This patch implements native Thread Local Storage access on Windows, as motivated by PR80881. Currently, Thread Local Storage accesses on Windows relies on emulation, which is detrimental to performance in certain applications, notably the Python Interpreter and the gcc port of the Java Virtual Machine. This patch was heavily inspired by Daniel Green's original work on native Windows Thread Local Storage from over a decade ago, which can be found at https://github.com/venix1/MinGW-GDC/blob/master/patches/mingw-tls-gcc-4.8.patch as a reference. Co-authored-by: Eric Botcazou <botcazou@adacore.com> Co-authored-by: Uroš Bizjak <ubizjak@gmail.com> Co-authored-by: Liu Hao <lh_mouse@126.com> Signed-off-by: Julian Waters <tanksherman27@gmail.com> Signed-off-by: Jonathan Yong <10walls@gmail.com> gcc/ChangeLog: * config/i386/i386.cc (ix86_legitimate_constant_p): Handle new UNSPEC. (legitimate_pic_operand_p): Handle new UNSPEC. (legitimate_pic_address_disp_p): Handle new UNSPEC. (ix86_legitimate_address_p): Handle new UNSPEC. (ix86_tls_index_symbol): New symbol for _tls_index. (ix86_tls_index): Handle creation of _tls_index symbol. (legitimize_tls_address): Create thread local access sequence. (output_pic_addr_const): Handle new UNSPEC. (i386_output_dwarf_dtprel): Handle new UNSPEC. (i386_asm_output_addr_const_extra): Handle new UNSPEC. * config/i386/i386.h (TARGET_WIN32_TLS): Define. * config/i386/i386.md: New UNSPEC. * config/i386/predicates.md: Handle new UNSPEC. * config/mingw/mingw32.h (TARGET_WIN32_TLS): Define. (TARGET_ASM_SELECT_SECTION): Define. (DEFAULT_TLS_SEG_REG): Define. * config/mingw/winnt.cc (mingw_pe_select_section): Select proper TLS section. (mingw_pe_unique_section): Handle TLS section. * config/mingw/winnt.h (mingw_pe_select_section): Declare. * configure: Regenerate. * configure.ac: New check for broken linker thread local support
First, try mapping the PCH to its original address. If that fails, try letting the system choose one; the PCH can be relocated thereafter. Reference: https://gcc.gnu.org/pipermail/gcc-patches/2022-May/594556.html 2022-05-11 LIU Hao <lh_mouse@126.com> Signed-off-by: Jonathan Yong <10walls@gmail.com> PR pch/14940 gcc/ChangeLog: * config/i386/host-mingw32.cc (mingw32_gt_pch_use_address): Replace the loop that attempted to map the PCH only to its original address with more adaptive operations
This patch adds Proof-of-Concept LoongArch vector calling convention support, and can be enabled by __attribute__ ((vecarg)) or -mvecarg option. The details and discussion can be found at Github loongson/gcc repo's issue list. gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Add vector calling convention support. * config/loongarch/loongarch-protos.h (loongarch_init_cumulative_args): Ditto. * config/loongarch/loongarch.cc (loongarch_simd_abi): Ditto. (loongarch_fntype_abi): Ditto. (loongarch_comp_type_attributes): Ditto. (loongarch_init_cumulative_args): Ditto. (loongarch_insn_callee_abi): Ditto. (loongarch_flatten_aggregate_field): Ditto. (loongarch_flatten_aggregate_argument): Ditto. (loongarch_pass_aggregate_num_fpr): Ditto. (loongarch_pass_aggregate_in_fpr_and_gpr_p): Ditto. (loongarch_get_arg_info): Ditto. (loongarch_function_arg): Ditto. (loongarch_function_value_1): Ditto. (loongarch_return_in_memory): Ditto. (loongarch_call_tls_get_addr): Ditto. (loongarch_output_mi_thunk): Ditto. (TARGET_FNTYPE_ABI): Ditto. (TARGET_COMP_TYPE_ATTRIBUTES): Ditto. (TARGET_INSN_CALLEE_ABI): Ditto. * config/loongarch/loongarch.h (enum loongarch_pcs): Ditto. (INIT_CUMULATIVE_ARGS): Ditto. * config/loongarch/loongarch.md: Ditto. * config/loongarch/loongarch.opt: Ditto. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-1.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-2.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-3.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-4.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-5.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-pass-struct-6.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-1.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-2.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-3.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-4.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-5.c: New test. * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-6.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-1.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-2.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-stdarg-1.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-stdarg-2.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-1.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-2.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-3.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-4.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-5.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-pass-struct-6.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-1.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-2.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-3.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-4.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-5.c: New test. * gcc.target/loongarch/vector/lsx/vect-abi-ret-struct-6.c: New test.
…ent. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_fntype_abi): Fixing up loongarch_fntype_abi () and TARGET_VECARG judgement. (loongarch_flatten_aggregate_field): Ditto. (loongarch_flatten_aggregate_argument): Ditto.
…ember. This patch fixes the wrong-placed condition inside loongarch_flatten_aggregate_field () function, which causes the ICE. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_flatten_aggregate_field): Fixing ICE when returning struct with more than 2 vector member. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lasx/vect-abi-ret-struct-7.c: New test.
There's a invoking to gen_call_value_internal() that missing pcs
argument. This patch corrects it.
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_call_tls_get_addr):
Add missing pcs argument for gen_call_value_internal().
vect-abi-pass-1.c checks instruction with $vr0 as parameter instead of $vr8, which is wrong compares to expected checking sequence. gcc/testsuite/ChangeLog: * gcc.target/loongarch/vector/lsx/vect-abi-pass-1.c: Change vr0 to vr8 in checking sequence.
Cancel this commit because problem is disappeared. This reverts commit 4ad1dfc.
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This patch adds Proof-of-Concept LoongArch vector calling convention support, and can be enabled by
__attribute__ ((vecarg))or-mvecargoption. The details and discussion can be found at Github loongson/gcc repo's issue list.