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1 parent c4e7f97 commit 1954f75Copy full SHA for 1954f75
rtl/tc_l2/src/main/scala/port/LDIO.scala
rtl/tc_l2/src/main/scala/port/SDIO.scala renamed to rtl/tc_l2/src/main/scala/port/LSIO.scala
@@ -3,9 +3,16 @@ package treecorel2
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import chisel3._
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import chisel3.util._
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+class LDIO extends Bundle {
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+ val en = Output(Bool())
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+ val addr = Output(UInt(64.W))
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+ val data = Input(UInt(64.W))
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+ val size = Output(UInt(3.W))
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+}
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+
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class SDIO extends Bundle {
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val en = Output(Bool())
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val addr = Output(UInt(64.W))
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val data = Output(UInt(64.W))
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val mask = Output(UInt(8.W))
-}
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