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149 followers · 10 following
  • Mirafra technologies Pvt Ltd
  • Bangalore, India

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  1. PeakRDL-uvm PeakRDL-uvm Public

    Forked from SystemRDL/PeakRDL-uvm

    Generate UVM register model from compiled SystemRDL input

    Python 5

  2. mbits-mirafra/axi4_avip mbits-mirafra/axi4_avip Public

    SystemVerilog 40 35

  3. mbits-mirafra/apb_avip mbits-mirafra/apb_avip Public

    SystemVerilog 17 18

  4. mbits-mirafra/spi_avip mbits-mirafra/spi_avip Public

    SystemVerilog 11 7

  5. muneeb-mbytes/UVMF muneeb-mbytes/UVMF Public

    SystemVerilog 16 8

  6. SystemVerilogCourse SystemVerilogCourse Public

    Forked from mbits-mirafra/SystemVerilogCourse

    This is a detailed SystemVerilog course

    SystemVerilog 4 1