Rectify Bluefin NAND on-die ECC support #226
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gratian merged 4 commits intoni:nilrt/master/6.6from Apr 22, 2025
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Add `enable_subpage_read` and `enable_subpage_write` load-time options to toggle subpage read/write operations on pl353 chips. Both options are enabled by default, and may be toggled in the boot loader. Signed-off-by: Haris Okanovic <haris.okanovic@ni.com> Acked-by: Gratian Crisan <gratian.crisan@ni.com> Acked-by: Jeff Westfahl <jeff.westfahl@ni.com> Natinst-CAR-ID: 599280 Natinst-ReviewBoard-ID: 151758 (cherry picked from commit 311a5711cfdbfa20e3f4ec2dbd429f96b9f76c2f) (cherry picked from commit f261b4b) Signed-off-by: HatsyRei <yan.huan.chng@emerson.com>
Existing devices which utilize Micron NAND may contain partitions formatted with subpages. Support this use case by implementing hooks for subpage read and write in Micron NAND driver. Signed-off-by: HatsyRei <yan.huan.chng@emerson.com>
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chaitu236
approved these changes
Apr 22, 2025
gratian
approved these changes
Apr 22, 2025
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@HatsyRei Can you create a PR with these changes against our 'kernel-next' branch too: Normally I would just cherry pick them but this is a bit non-trivial due to the reverts. |
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WI: AB#3076957
Bluefin utilizes the Micron MT29F2G08ABBEAH4 NAND flash via the onboard PL353 NAND controller. In 4.1, on-die ECC operations along with raw NAND read/write hooks were implemented in the pl353_nand driver. Following 10d4e75, Micron NAND specific logic has been moved into nand_micron.c.
This PR rectifies previous on-die ECC and NAND subpage read/write implementations by implementing NAND on-die ECC subpage read/write support in nand_micron.c instead of pl35x-nand-controller.c.
Testing: Deployed changes onto cDAQ-9189. Previously observed bitflips no longer reproducible after on-die ECC is enabled correctly.