Clock separation

boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi

@@ -92,6 +92,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi

@@ -92,6 +92,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts

@@ -135,3 +135,11 @@
 &clock {
 	status = "okay";
 };
+
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};

boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts

@@ -142,3 +142,15 @@
 &clock {
 	status = "okay";
 };
+
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
+&xo24m {
+	status = "okay";
+};

boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi

@@ -101,6 +101,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &gpregret1 {
 	status = "okay";
 

boards/nordic/nrf54l15dk/pre_dt_board.cmake

@@ -0,0 +1,6 @@
+# Copyright (c) 2025 Nordic Semiconductor
+# SPDX-License-Identifier: Apache-2.0
+
+# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
+# - power@X010e000 & clock@X010e000 & xo@X010e000 & lfclk@X010e000
+list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi

@@ -130,6 +130,18 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
+&xo24m {
+	status = "okay";
+};
+
 &ieee802154 {
 	status = "okay";
 };

boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi

@@ -91,6 +91,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi

@@ -92,6 +92,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 	cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts

@@ -99,6 +99,14 @@
 	status = "okay";
 };
 
+&xo {
+	status = "okay";
+};
+
+&lfclk {
+	status = "okay";
+};
+
 &spi00 {
 	status = "okay";
 

drivers/audio/dmic_nrfx_pdm.c

@@ -9,7 +9,7 @@
 #include <zephyr/audio/dmic.h>
 #include <zephyr/drivers/clock_control/nrf_clock_control.h>
 #include <zephyr/drivers/pinctrl.h>
-#include <zephyr/dt-bindings/clock/nrf-auxpll.h>
+#include <zephyr/dt-bindings/clock/nr-fauxpll.h>
 #include <soc.h>
 #include <dmm.h>
 #include <nrfx_pdm.h>
@@ -32,16 +32,17 @@ BUILD_ASSERT((DMIC_NRFX_AUDIO_CLOCK_FREQ == NRF_AUXPLL_FREQ_DIV_AUDIO_48K) ||
 #define DMIC_NRFX_CLOCK_FREQ MHZ(32)
 #else
 #define DMIC_NRFX_CLOCK_FREQ MHZ(32)
-#define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP_OR(DT_NODELABEL(aclk), clock_frequency, \
-				   DT_PROP_OR(DT_NODELABEL(clock), hfclkaudio_frequency, 0))
+#define DMIC_NRFX_AUDIO_CLOCK_FREQ                                                                 \
+	DT_PROP_OR(DT_NODELABEL(aclk), clock_frequency,                                            \
+		   DT_PROP_OR(DT_NODELABEL(hfclkaudio), hfclkaudio_frequency, 0))
 #endif
 
 struct dmic_nrfx_pdm_drv_data {
 	nrfx_pdm_t pdm;
 #if CONFIG_CLOCK_CONTROL_NRFS_AUDIOPLL || DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL)
 	const struct device *audiopll_dev;
 #elif CONFIG_CLOCK_CONTROL_NRF
-	struct onoff_manager *clk_mgr;
+	const struct device *clk_dev;
 #endif
 	struct onoff_client clk_cli;
 	struct k_mem_slab *mem_slab;
@@ -86,7 +87,7 @@ static int request_clock(struct dmic_nrfx_pdm_drv_data *drv_data)
 #if CONFIG_CLOCK_CONTROL_NRFS_AUDIOPLL || DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL)
 	return nrf_clock_control_request(drv_data->audiopll_dev, NULL, &drv_data->clk_cli);
 #elif CONFIG_CLOCK_CONTROL_NRF
-	return onoff_request(drv_data->clk_mgr, &drv_data->clk_cli);
+	return nrf_clock_control_request(drv_data->clk_dev, NULL, &drv_data->clk_cli);
 #else
 	return -ENOTSUP;
 #endif
@@ -100,7 +101,7 @@ static int release_clock(struct dmic_nrfx_pdm_drv_data *drv_data)
 #if CONFIG_CLOCK_CONTROL_NRFS_AUDIOPLL || DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL)
 	return nrf_clock_control_release(drv_data->audiopll_dev, NULL);
 #elif CONFIG_CLOCK_CONTROL_NRF
-	return onoff_release(drv_data->clk_mgr);
+	return nrf_clock_control_release(drv_data->clk_dev, NULL);
 #else
 	return -ENOTSUP;
 #endif
@@ -467,21 +468,21 @@ static void init_clock_manager(const struct device *dev)
 	struct dmic_nrfx_pdm_drv_data *drv_data = dev->data;
 	drv_data->audiopll_dev = DEVICE_DT_GET(NODE_AUDIO_AUXPLL);
 #elif CONFIG_CLOCK_CONTROL_NRF
-	clock_control_subsys_t subsys;
 	struct dmic_nrfx_pdm_drv_data *drv_data = dev->data;
 #if NRF_CLOCK_HAS_HFCLKAUDIO
 	const struct dmic_nrfx_pdm_drv_cfg *drv_cfg = dev->config;
 
 	if (drv_cfg->clk_src == ACLK) {
-		subsys = CLOCK_CONTROL_NRF_SUBSYS_HFAUDIO;
+		drv_data->clk_dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_hfclkaudio);
 	} else
 #endif
 	{
-		subsys = CLOCK_CONTROL_NRF_SUBSYS_HF;
+		drv_data->clk_dev = DEVICE_DT_GET_ONE(COND_CODE_1((NRF_CLOCK_HAS_HFCLK),
+								  (nordic_nrf_clock_hfclk),
+								  (nordic_nrf_clock_xo)));
 	}
 
-	drv_data->clk_mgr = z_nrf_clock_control_get_onoff(subsys);
-	__ASSERT_NO_MSG(drv_data->clk_mgr != NULL);
+	__ASSERT_NO_MSG(drv_data->clk_dev != NULL);
 #elif CONFIG_CLOCK_CONTROL_NRFS_AUDIOPLL
 	struct dmic_nrfx_pdm_drv_data *drv_data = dev->data;
 
@@ -537,13 +538,13 @@ static const struct _dmic_ops dmic_ops = {
 	BUILD_ASSERT(PDM_CLK_SRC(inst) != ACLK || NRF_PDM_HAS_SELECTABLE_CLOCK,                    \
 		     "Clock source ACLK is not available.");                                       \
 	BUILD_ASSERT(PDM_CLK_SRC(inst) != ACLK ||                                                  \
-			     DT_NODE_HAS_PROP(DT_NODELABEL(clock), hfclkaudio_frequency) ||        \
+			     DT_NODE_HAS_PROP(DT_NODELABEL(hfclkaudio), hfclkaudio_frequency) ||   \
 			     DT_NODE_HAS_PROP(DT_NODELABEL(aclk), clock_frequency) ||              \
 			     DT_NODE_HAS_PROP(NODE_AUDIOPLL, frequency) ||                         \
 			     DT_NODE_HAS_PROP(NODE_AUDIO_AUXPLL, nordic_frequency),                \
 		     "Clock source ACLK requires one following defined frequency "                 \
 		     "properties: "                                                                \
-		     "hfclkaudio-frequency in the nordic,nrf-clock node, "                         \
+		     "hfclkaudio-frequency in the nordic,nrf-clock-hfclkaudio node, "              \
 		     "clock-frequency in the aclk node, "                                          \
 		     "frequency in the audiopll node, "                                            \
 		     "nordic-frequency in the audio_auxpll node");                                 \

drivers/clock_control/CMakeLists.txt

@@ -23,7 +23,6 @@ zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MCUX_SYSCON         clock_cont
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MSPM0               clock_control_mspm0.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NPCM                clock_control_npcm.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NPCX                clock_control_npcx.c)
-zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF                 clock_control_nrf.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION nrf_clock_calibration.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_RV32M1_PCC          clock_control_rv32m1_pcc.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_INFINEON_CAT1       clock_control_ifx_cat1.c)
@@ -58,8 +57,15 @@ zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_FLL16M          clock_cont
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF54H_HFXO         clock_control_nrf54h_hfxo.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HSFLL_LOCAL     clock_control_nrf_hsfll_local.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL clock_control_nrf_iron_hsfll_local.c)
-zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_LFCLK           clock_control_nrf_lfclk.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRFS_LFCLK          clock_control_nrfs_lfclk.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_AUXPLL          clock_control_nrf_auxpll.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HFCLK           clock_control_nrf_hfclk.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_XO              clock_control_nrf_xo.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_LFCLK           clock_control_nrf_lfclk.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HFCLK192M       clock_control_nrf_hfclk192m.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_XO24M           clock_control_nrf_hfclkaudio.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_XO24M       clock_control_nrf_xo24m.c)
+zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_COMMON          clock_control_nrf_common.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL60X   clock_control_bl60x.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL61X   clock_control_bl61x.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL70X   clock_control_bl70x.c)
@@ -129,3 +135,5 @@ endif()
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_AST10X0 clock_control_ast10x0.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MAX32 clock_control_max32.c)
 zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_WCH_RCC clock_control_wch_rcc.c)
+
+zephyr_linker_sources(SECTIONS clock_control_nrf_irq_handlers.ld)

drivers/clock_control/Kconfig.nrf

@@ -307,21 +307,60 @@ config CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL_DVFS_TIMEOUT_MS
 
 endif # CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL
 
-config CLOCK_CONTROL_NRF_LFCLK
+config CLOCK_CONTROL_NRFS_LFCLK
 	bool "NRF LFCLK driver support"
-	depends on DT_HAS_NORDIC_NRF_LFCLK_ENABLED
+	depends on DT_HAS_NORDIC_NRFS_LFCLK_ENABLED
 	select NRFS
 	select NRFS_CLOCK_SERVICE_ENABLED
 	select CLOCK_CONTROL_NRF2_COMMON
 	default y
 
-if CLOCK_CONTROL_NRF_LFCLK
+if CLOCK_CONTROL_NRFS_LFCLK
 
-config CLOCK_CONTROL_NRF_LFCLK_CLOCK_TIMEOUT_MS
+config CLOCK_CONTROL_NRFS_LFCLK_CLOCK_TIMEOUT_MS
 	int "Timeout waiting for nrfs clock service callback in milliseconds"
 	default 1000
 
-endif # CLOCK_CONTROL_NRF_LFCLK
+endif # CLOCK_CONTROL_NRFS_LFCLK
+
+config CLOCK_CONTROL_NRF_COMMON
+	bool
+
+config CLOCK_CONTROL_NRF_HFCLK
+	bool "NRF HFCLK driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_HFCLK_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
+
+config CLOCK_CONTROL_NRF_XO
+	bool "NRF XO driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_XO_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
+
+config CLOCK_CONTROL_NRF_LFCLK
+	bool "NRF LFCLK driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_LFCLK_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
+
+config CLOCK_CONTROL_NRF_HFCLK192M
+	bool "NRF HFCLK192M driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_HFCLK192M_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
+
+config CLOCK_CONTROL_NRF_HFCLKAUDIO
+	bool "NRF HFCLKAUDIO driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_HFCLKAUDIO_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
+
+config CLOCK_CONTROL_NRF_XO24M
+	bool "NRF XO242M driver support"
+	depends on DT_HAS_NORDIC_NRF_CLOCK_XO24M_ENABLED
+	select CLOCK_CONTROL_NRF_COMMON
+	default y
 
 config CLOCK_CONTROL_NRF_AUXPLL
 	bool "nRF Auxiliary PLL driver"