A TypeScript emulator for the Blue processor described by Caxton C. Foster.
This project aims to faithfully reproduce the behavior of the Blue CPU from the classic book Computer Architecture: A Constructive Approach.
The emulator simulates clock cycles, CPU states (FETCH/EXECUTE), internal registers, and memory, allowing you to load small programs and observe their execution step-by-step.
The goal of this interpreter is to:
- Reproduce the instruction cycle of the Blue processor
- Emulate its internal registers (PC, A, IR, MAR, MBR, etc.)
- Execute programs made of 16-bit words
- Serve as a learning tool for computer architecture, compilers, and CPU design
This project also complements the study of compiler construction — showing how a processor works internally through a clean TypeScript implementation.
The CPU execution follows these steps:
-
A program is loaded into RAM (a
Uint16Arrayof instructions). -
The CPU enters the main loop.
-
Each cycle calls
EmulateCycle(), which:- Advances through 8 clock ticks
- Performs FETCH → EXECUTE
-
After each cycle, register values are printed using
DumpRegister().
- PC – Program Counter
- A – Accumulator
- IR – Instruction Register
- Z – Zero flag
- MAR – Memory Address Register
- MBR – Memory Buffer Register
- DSL, DIL, DOL – Auxiliary 8-bit registers
src/
└─ cpu/
├─ Cycle.ts
├─ Runner.ts
├─ Registers.ts
├─ Dump.ts
├─ Program.ts
├─ Nop.ts
└─ ...
index.ts
npm install
npm run devOr run it directly using ts-node:
npx ts-node src/index.tsThe file Program.ts includes a simple program:
export const program0 = new Uint16Array([
0xF000,
0xF003,
0xF000,
0xF005
]);You run it with:
RunProgram(program0)During execution, the CPU dumps the register state:
PC:0001 | A:0000 | IR:F000 | Z:0000 | MAR:0001 | MBR:F000 | DSL:00 | DIL:00 | DOL:00
This allows you to visually track each step of the CPU cycle.