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@sihuan sihuan commented Aug 18, 2025

llvm intrinsic for
- SIMD 8-bit Multiply Instructions
- SIMD 16-bit Multiply Instructions
- 64-bit Add/Subtract Instructions
- Signed 16-bit Multiply 64-bit Add/Subtract Instruction
- 32-bit Multiply 64-bit Add/Subtract Instruction
- SIMD 32-bit Shift Instructions
- SIMD 32-bit Miscellaneous Instructions
- 32-bit Multiply & Add Instructions
- 32-bit Packing Instructions
- smal,mulr64,mulsr64,maddr32,msubr32,srai.u,bitrevi,wext,wexti,sraiw.u

define add64/sub64 as rv32-only instruction

llvm intrinsic for
    - SIMD 8-bit Multiply Instructions
    - SIMD 16-bit Multiply Instructions
    - 64-bit Add/Subtract Instructions
    - Signed 16-bit Multiply 64-bit Add/Subtract Instruction
    - 32-bit Multiply 64-bit Add/Subtract Instruction
    - SIMD 32-bit Shift Instructions
    - SIMD 32-bit Miscellaneous Instructions
    - 32-bit Multiply & Add Instructions
    - 32-bit Packing Instructions
    - smal,mulr64,mulsr64,maddr32,msubr32,srai.u,bitrevi,wext,wexti,sraiw.u

define add64/sub64 as rv32-only instruction
@ChunyuLiao ChunyuLiao merged commit 2a55738 into plctlab:p-extension-andes-v1 Aug 18, 2025
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2 participants