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For #2917, This PR is targeted to port test/prototype/mx_formats/test_kernels.py and test/prototype/mx_formats/test_mx_tensor.py to intel XPU.

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pytorch-bot bot commented Dec 2, 2025

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🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/ao/3409

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@meta-cla meta-cla bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Dec 2, 2025
@zxd1997066 zxd1997066 force-pushed the xiangdong/prototype_mx branch from 64fa6b2 to dd6ae61 Compare December 2, 2025 01:50
@zxd1997066 zxd1997066 marked this pull request as ready for review December 2, 2025 02:08
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cc @liangan1

@liangan1 liangan1 added xpu Intel XPU related features topic: for developers Use this tag if this PR is mainly developer facing ciflow/xpu label used to trigger xpu CI jobs labels Dec 3, 2025
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vkuzo commented Dec 4, 2025

do intel XPUs support mxfp8, mxfp4, nvfp4 formats? If not, I'd say we don't need to add them here?

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ciflow/xpu label used to trigger xpu CI jobs CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. topic: for developers Use this tag if this PR is mainly developer facing xpu Intel XPU related features

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