Prepare qcom-next based on tag 'Linux 6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

.github/workflows/email_checker.yml

@@ -0,0 +1,11 @@
+name: PR email addresses checker
+
+on:
+  pull_request:
+
+jobs:
+  pr-check-emails:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Check PR emails
+        uses: qualcomm/commit-emails-check-action@main

.github/workflows/kernel_checker.yml

@@ -0,0 +1,35 @@
+name: Kernel Checkers
+on:
+  pull_request:
+
+jobs:
+  prepare:
+    runs-on:
+      group: GHA-Kernel-SelfHosted-RG
+      labels: [ self-hosted, kernel-prd-u2404-x64-large-od-ephem ]
+    steps:
+      - name: Checkout PR Code
+        uses: actions/checkout@v4
+        with:
+          fetch-depth: 0
+    outputs:
+      kernel_src: ${{ github.workspace }}
+      base_sha: ${{ github.event.pull_request.base.sha }}
+      head_sha: ${{ github.event.pull_request.head.sha }}
+
+  checker:
+    needs: prepare
+    uses: qualcomm-linux/kernel-checkers/.github/workflows/checker.yml@main
+    with:
+      check_name: ${{ matrix.check }}
+      kernel_src: ${{ needs.prepare.outputs.kernel_src }}
+      base_sha: ${{ needs.prepare.outputs.base_sha }}
+      head_sha: ${{ needs.prepare.outputs.head_sha }}
+      base_branch: ${{ github.base_ref }}
+      pr_number: ${{ github.event.pull_request.number }}
+
+    strategy:
+      matrix:
+        check: [check-uapi-headers, sparse-check, checkpatch,
+          dt-binding-check, dtb-check]
+      fail-fast: false

.github/workflows/pre_merge.yml

@@ -0,0 +1,8 @@
+name: pre_merge
+on:
+  pull_request_target:
+
+jobs:
+  pre-merge:
+    uses: qualcomm-linux/kernel-config/.github/workflows/pre_merge.yml@main
+    secrets: inherit

Documentation/ABI/testing/sysfs-bus-coresight-devices-cti

@@ -239,3 +239,9 @@ Date:		March 2020
 KernelVersion:	5.7
 Contact:	Mike Leach or Mathieu Poirier
 Description:	(Write) Clear all channel / trigger programming.
+
+What:           /sys/bus/coresight/devices/<cti-name>/label
+Date:           Feb 2025
+KernelVersion   6.15
+Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
+Description:    (Read) Show hardware context information of device.

Documentation/ABI/testing/sysfs-bus-coresight-devices-funnel

@@ -10,3 +10,9 @@ Date:		November 2014
 KernelVersion:	3.19
 Contact:	Mathieu Poirier <mathieu.poirier@linaro.org>
 Description:	(RW) Defines input port priority order.
+
+What:           /sys/bus/coresight/devices/<memory_map>.funnel/label
+Date:           Feb 2025
+KernelVersion   6.15
+Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
+Description:    (Read) Show hardware context information of device.

Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu

@@ -0,0 +1,51 @@
+What:		/sys/bus/coresight/devices/<tgu-name>/enable_tgu
+Date:		February 2025
+KernelVersion	6.15
+Contact:	Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+		(RW) Set/Get the enable/disable status of TGU
+		Accepts only one of the 2 values -  0 or 1.
+		0 : disable TGU.
+		1 : enable TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/step[0:7]_priority[0:3]/reg[0:17]
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (RW) Set/Get the sensed signal with specific step and priority for TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/step[0:7]_condition_decode/reg[0:3]
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (RW) Set/Get the decode mode with specific step for TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/step[0:7]_condition_select/reg[0:3]
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (RW) Set/Get the next action with specific step for TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/step[0:7]_timer/reg[0:1]
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (RW) Set/Get the timer value with specific step for TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/step[0:7]_counter/reg[0:1]
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (RW) Set/Get the counter value with specific step for TGU.
+
+What:           /sys/bus/coresight/devices/<tgu-name>/reset_tgu
+Date:           February 2025
+KernelVersion   6.15
+Contact:        Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
+Description:
+                (Write) Write 1 to reset the dataset for TGU.

Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm

@@ -272,3 +272,9 @@ KernelVersion	6.15
 Contact:	Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
 Description:
 		(RW) Set/Get the enablement of the individual lane.
+
+What:           /sys/bus/coresight/devices/<tpdm-name>/label
+Date:           Feb 2025
+KernelVersion   6.15
+Contact:        Mao Jinlong <quic_jinlmao@quicinc.com>
+Description:    (Read) Show hardware context information of device.

Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml

@@ -98,6 +98,12 @@ properties:
   power-domains:
     maxItems: 1
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   arm,cti-ctm-id:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:

Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml

@@ -39,6 +39,12 @@ properties:
     enum:
       - arm,coresight-dummy-sink
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   in-ports:
     $ref: /schemas/graph.yaml#/properties/ports
 

Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml

@@ -38,6 +38,12 @@ properties:
     enum:
       - arm,coresight-dummy-source
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   arm,static-trace-id:
     description: If dummy source needs static id support, use this to set trace id.
     $ref: /schemas/types.yaml#/definitions/uint32

Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml

@@ -57,6 +57,12 @@ properties:
   power-domains:
     maxItems: 1
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   in-ports:
     $ref: /schemas/graph.yaml#/properties/ports
 

Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml

@@ -54,6 +54,12 @@ properties:
       - const: apb_pclk
       - const: atclk
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   power-domains:
     maxItems: 1
 

Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml

@@ -30,6 +30,12 @@ properties:
   power-domains:
     maxItems: 1
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   in-ports:
     $ref: /schemas/graph.yaml#/properties/ports
 

Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml

@@ -30,6 +30,12 @@ properties:
   power-domains:
     maxItems: 1
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   in-ports:
     $ref: /schemas/graph.yaml#/properties/ports
     additionalProperties: false

Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml

@@ -55,6 +55,12 @@ properties:
       - const: apb_pclk
       - const: atclk
 
+  label:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Define the label which can describe what kind of HW or system the
+      coresight device belongs to.
+
   iommus:
     maxItems: 1
 

Documentation/devicetree/bindings/arm/psci.yaml

@@ -98,6 +98,27 @@ properties:
       [1] Kernel documentation - ARM idle states bindings
         Documentation/devicetree/bindings/cpu/idle-states.yaml
 
+  reset-types:
+    type: object
+    $ref: /schemas/power/reset/reboot-mode.yaml#
+    unevaluatedProperties: false
+    properties:
+      # "mode-normal" is just SYSTEM_RESET
+      mode-normal: false
+    patternProperties:
+      "^mode-.*$":
+        minItems: 1
+        maxItems: 2
+        description: |
+          Describes a vendor-specific reset type. The string after "mode-"
+          maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call.
+
+          Parameters are named mode-xxx = <type[, cookie]>, where xxx
+          is the name of the magic reboot mode, type is the lower 31 bits
+          of the reset_type, and, optionally, the cookie value. If the cookie
+          is not provided, it is defaulted to zero.
+          The 31st bit (vendor-resets) will be implicitly set by the driver.
+
 patternProperties:
   "^power-domain-":
     $ref: /schemas/power/power-domain.yaml#
@@ -137,6 +158,15 @@ allOf:
       required:
         - cpu_off
         - cpu_on
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              const: arm,psci-1.0
+    then:
+      properties:
+        reset-types: false
 
 additionalProperties: false
 
@@ -261,4 +291,17 @@ examples:
         domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
       };
     };
+
+  - |+
+
+    // Case 5: SYSTEM_RESET2 vendor resets
+    psci {
+      compatible = "arm,psci-1.0";
+      method = "smc";
+
+      reset-types {
+        mode-edl = <0>;
+        mode-bootloader = <1 2>;
+      };
+    };
 ...

Documentation/devicetree/bindings/arm/qcom,coresight-qmi.yaml

@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/qcom,coresight-qmi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm coresight QMI(Qualcomm Messaging Interface) component
+
+description: |
+  Qualcomm Messaging Interface (QMI) is an interface that clients can
+  use to send, and receive, messages from a remote entity. The coresight
+  QMI component is to configure QMI instance ids and service ids for different
+  remote subsystem connections. Coresight QMI driver uses the ids to init
+  the qmi connections. Other coresight drivers call the send qmi request
+  function when connection is established.
+
+maintainers:
+  - Mao Jinlong <quic_jinlmao@quicinc.com>
+
+properties:
+  compatible:
+    enum:
+      - qcom,coresight-qmi
+
+patternProperties:
+  '^conns(-[0-9]+)?$':
+    type: object
+    description:
+      QMI instance id and service id for different remote subsystem connections.
+
+    properties:
+      qmi-id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Instance id for the remote subsystem connection.
+
+      service-id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description:
+          Service id for the remote subsystem connection.
+
+    additionalProperties: false
+
+    required:
+      - qmi-id
+      - service-id
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  # Minimum coresight qmi definition.
+  - |
+    coresight-qmi {
+      compatible = "qcom,coresight-qmi";
+
+      conns-0 {
+          qmi-id = <0xd>;
+          service-id = <0x33>;
+      };
+    };
+
+...