ADC: lost samples fix#56
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dron0gus merged 4 commits intorusefi:stable_20.3.x.rusefi_clean_historyfrom Apr 28, 2025
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According to DS: At the end of the last DMA transfer (number of transfers configured in the DMA controller’s DMA_SxNTR register): - No new DMA request is issued to the DMA controller if the DDS bit is cleared to 0 in the ADC_CR2 register (this avoids generating an overrun error). However the DMA bit is not cleared by hardware. It must be written to 0, then to 1 to start a new transfer. - Requests can continue to be generated if the DDS bit is set to 1. This allows configuring the DMA in double-buffer circular mode.
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@dron0gus CI says it does not compile |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16927 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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Let me fix it. |
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Cumulative ADCv2 update.
One backported patch - actually fixes the issue.
Plus 3 more patches to test and later submit to ChibiOS.