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  • ISP RAS
  • Moscow, Russia

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  1. ispras/hdl-benchmarks ispras/hdl-benchmarks Public

    Collection of digital hardware modules & projects (benchmarks)

    Verilog 98 14

  2. ispras/sv-tests ispras/sv-tests Public

    Test suites on Verilog and SystemVerilog standards

    SystemVerilog 7 1

  3. ispras/fir-tests ispras/fir-tests Public

    Test suites on FIRRTL specifications

    FIRRTL 2 1

  4. ispras/hls-idct ispras/hls-idct Public

    Inverse Discrete Cosine Transform (IDCT) algorithm implementations are written in languages for High-Level Synthesis (HLS) and Hardware Construction (HC) tools.

    Verilog 3 1

  5. ispras/utopia-hls ispras/utopia-hls Public

    Utopia: a High-Level Synthesis framework

    C++ 11 5