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peci: Fix eSPI host becoming unresponsive #530

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peci: Fix eSPI host becoming unresponsive #530

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ad41a1d
peci: Wait for eSPI upstream busy
crawfxrd Aug 18, 2025
325a26e
peci: Actually clear ESUCTRL0 before starting
crawfxrd Aug 18, 2025
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32 changes: 26 additions & 6 deletions src/board/system76/common/peci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,7 @@ void peci_init(void) {}
bool peci_get_temp(int16_t *const data) {
//TODO: Wait for completion?
// Clear upstream status
ESUCTRL0 = ESUCTRL0;
ESUCTRL0 = ESUCTRL0_CH_DISABLED | ESUCTRL0_DONE;
// Clear OOB status
ESOCTRL0 = ESOCTRL0;

Expand Down Expand Up @@ -93,18 +93,28 @@ bool peci_get_temp(int16_t *const data) {

// Set upstream enable
ESUCTRL0 |= ESUCTRL0_ENABLE;

// Wait for upstream to be available
systick_t start = time_get();
while (ESUCTRL0 & ESUCTRL0_BUSY) {
if ((time_get() - start) >= PECI_ESPI_TIMEOUT) {
DEBUG("peci_get_temp: upstream busy\n");
return false;
}
}

// Set upstream go
ESUCTRL0 |= ESUCTRL0_GO;

// Wait until upstream done
systick_t start = time_get();
start = time_get();
while (!(ESUCTRL0 & ESUCTRL0_DONE)) {
if ((time_get() - start) >= PECI_ESPI_TIMEOUT) {
DEBUG("peci_get_temp: upstream timeout\n");
return false;
}
}
// Clear upstream done status
// Clear upstream done status and disable initiating upstream transactions
ESUCTRL0 = ESUCTRL0_DONE;

// Wait for response
Expand Down Expand Up @@ -146,7 +156,7 @@ bool peci_get_temp(int16_t *const data) {
int16_t peci_wr_pkg_config(uint8_t index, uint16_t param, uint32_t data) {
//TODO: Wait for completion?
// Clear upstream status
ESUCTRL0 = ESUCTRL0;
ESUCTRL0 = ESUCTRL0_CH_DISABLED | ESUCTRL0_DONE;
// Clear OOB status
ESOCTRL0 = ESOCTRL0;

Expand Down Expand Up @@ -189,19 +199,29 @@ int16_t peci_wr_pkg_config(uint8_t index, uint16_t param, uint32_t data) {

// Set upstream enable
ESUCTRL0 |= ESUCTRL0_ENABLE;

// Wait for upstream to be available
systick_t start = time_get();
while (ESUCTRL0 & ESUCTRL0_BUSY) {
if ((time_get() - start) >= PECI_ESPI_TIMEOUT) {
DEBUG("peci_wr_pkg_config: upstream busy\n");
return false;
}
}

// Set upstream go
ESUCTRL0 |= ESUCTRL0_GO;

// Wait until upstream done
systick_t start = time_get();
start = time_get();
while (!(ESUCTRL0 & ESUCTRL0_DONE)) {
DEBUG("peci_wr_pkg_config: wait upstream\n");
if ((time_get() - start) >= PECI_ESPI_TIMEOUT) {
DEBUG("peci_wr_pkg_config: upstream timeout\n");
return false;
}
}
// Clear upstream done status
// Clear upstream done status and disable initiating upstream transactions
ESUCTRL0 = ESUCTRL0_DONE;

// Wait for response
Expand Down
1 change: 1 addition & 0 deletions src/ec/ite/include/ec/espi.h
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Original file line number Diff line number Diff line change
Expand Up @@ -114,6 +114,7 @@ volatile uint8_t __xdata __at(0x31A3) ESGCTRL3;
volatile uint8_t __xdata __at(0x31B0) ESUCTRL0;
#define ESUCTRL0_ENABLE BIT(7)
#define ESUCTRL0_GO BIT(6)
#define ESUCTRL0_CH_DISABLED BIT(2)
#define ESUCTRL0_DONE BIT(1)
#define ESUCTRL0_BUSY BIT(0)

Expand Down