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dp: nocodec: switch playback SRC to DP by default #10469

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dp: nocodec: switch playback SRC to DP by default #10469

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99663a4
dp: application: restore double mapping for userspace
lyakh Jan 9, 2026
7ee9fb9
dp: nocodec: switch playback SRC to DP by default
lyakh Jan 6, 2026
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2 changes: 2 additions & 0 deletions src/schedule/zephyr_dp_schedule.h
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,9 @@ struct scheduler_dp_data {

enum sof_dp_part_type {
SOF_DP_PART_HEAP,
SOF_DP_PART_HEAP_CACHE,
SOF_DP_PART_CFG,
SOF_DP_PART_CFG_CACHE,
SOF_DP_PART_TYPE_COUNT,
};

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14 changes: 13 additions & 1 deletion src/schedule/zephyr_dp_schedule_application.c
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Original file line number Diff line number Diff line change
Expand Up @@ -391,7 +391,9 @@ void scheduler_dp_domain_free(struct processing_module *pmod)
struct task_dp_pdata *pdata = pmod->dev->task->priv_data;

k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_HEAP);
k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_HEAP_CACHE);
k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_CFG);
k_mem_domain_remove_partition(dp_mdom + core, pdata->mpart + SOF_DP_PART_CFG_CACHE);
}

/* Called only in IPC context */
Expand Down Expand Up @@ -505,12 +507,22 @@ int scheduler_dp_task_init(struct task **task, const struct sof_uuid_entry *uid,
.size = size,
.attr = K_MEM_PARTITION_P_RW_U_RW,
};
pdata->mpart[SOF_DP_PART_HEAP_CACHE] = (struct k_mem_partition){
.start = (uintptr_t)sys_cache_cached_ptr_get((void *)start),
.size = size,
.attr = K_MEM_PARTITION_P_RW_U_RW | XTENSA_MMU_CACHED_WB,
};
/* Host mailbox partition for additional IPC parameters: read-only */
pdata->mpart[SOF_DP_PART_CFG] = (struct k_mem_partition){
.start = (uintptr_t)MAILBOX_HOSTBOX_BASE,
.start = (uintptr_t)sys_cache_uncached_ptr_get((void *)MAILBOX_HOSTBOX_BASE),
.size = 4096,
.attr = K_MEM_PARTITION_P_RO_U_RO,
};
pdata->mpart[SOF_DP_PART_CFG_CACHE] = (struct k_mem_partition){
.start = (uintptr_t)MAILBOX_HOSTBOX_BASE,
.size = 4096,
.attr = K_MEM_PARTITION_P_RO_U_RO | XTENSA_MMU_CACHED_WB,
};

for (pidx = 0; pidx < SOF_DP_PART_TYPE_COUNT; pidx++) {
ret = k_mem_domain_add_partition(dp_mdom + core, pdata->mpart + pidx);
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11 changes: 6 additions & 5 deletions tools/topology/topology2/cavs-nocodec.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -96,7 +96,8 @@ Define {
SSP2_PCM_CORE_ID 2
DMIC0_PCM_0_NAME "DMIC SFX1"
DMIC0_PCM_1_NAME "DMIC SFX2"
SRC_DOMAIN "default"
SRC_DOMAIN_PLAYBACK "DP"
SRC_DOMAIN_CAPTURE "default"
# Keep DP_SRC_CORE_ID == SSP2_PCM_CORE_ID, no nested define resolvation ATM
DP_SRC_CORE_ID 2
}
Expand Down Expand Up @@ -694,8 +695,8 @@ IncludeByKey.PASSTHROUGH {
}
}
Object.Widget.src.1 {
scheduler_domain "$SRC_DOMAIN"
IncludeByKey.SRC_DOMAIN {
scheduler_domain "$SRC_DOMAIN_PLAYBACK"
IncludeByKey.SRC_DOMAIN_PLAYBACK {
"DP" {
core_id $DP_SRC_CORE_ID
domain_id 123
Expand Down Expand Up @@ -1378,8 +1379,8 @@ IncludeByKey.PASSTHROUGH {
Object.Widget.src.1 {
index 11
rate_in 48000
scheduler_domain "$SRC_DOMAIN"
IncludeByKey.SRC_DOMAIN {
scheduler_domain "$SRC_DOMAIN_CAPTURE"
IncludeByKey.SRC_DOMAIN_CAPTURE {
"DP" {
core_id $DP_SRC_CORE_ID
domain_id 123
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12 changes: 6 additions & 6 deletions tools/topology/topology2/development/tplg-targets.cmake
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Expand Up @@ -306,23 +306,23 @@ PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-tgl-nocodec-rtcaec.bin"

# SSP test topology for Data Processing SRC on MTL
"cavs-nocodec\;sof-mtl-nocodec-dp-test\;PLATFORM=mtl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN=DP"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"
# SSP test topology for Data Processing SRC on LNL
"cavs-nocodec\;sof-lnl-nocodec-dp-test\;PLATFORM=lnl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"
# SSP test topology for Data Processing SRC on PTL
"cavs-nocodec\;sof-ptl-nocodec-dp-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP"

# SSP test topology for Data Processing on core 1 SRC for MTL
"cavs-nocodec\;sof-mtl-nocodec-dp-core-test\;PLATFORM=mtl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-mtl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"
# SSP test topology for Data Processing on core 1 SRC for LNL
"cavs-nocodec\;sof-lnl-nocodec-dp-core-test\;PLATFORM=lnl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-lnl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"
# SSP test topology for Data Processing on core 1 SRC for PTL
"cavs-nocodec\;sof-ptl-nocodec-dp-core-test\;PLATFORM=ptl,NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,\
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN=DP,DP_SRC_CORE_ID=1"
PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-ptl-nocodec.bin,SRC_DOMAIN_CAPTURE=DP,DP_SRC_CORE_ID=1"

# Add MFCC to 16 kHz DMIC1, 2ch with NHLT - cAVS
"sof-hda-generic\;sof-hda-generic-cavs25-2ch-mfcc\;HDA_CONFIG=mix,\
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