Learning Verilog and simulating with Verilator.
Simple module and testbench for a module for flashing an LED. First time writing and simulating verilog.
Implemented a simple UART component. Consists of transmitting module, receiving module and top level UART module. Clock rate and baud rate can be configured. 1 start bit, 8 data bits, no parity bit and 1 stop bit (8N1). Also includes test benches for each module.