FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
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Updated
Jul 2, 2025 - Verilog
FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
Combinational ATPG generator based on D-Algorithm
A collection of Verilog-based digital design projects, from basic gates to complex modules like ALUs, FSMs, and memory units. Ideal for learning RTL design and synthesis.
⚡ A collection of Digital Logic Design (DLD) lab work and projects 🔌. Includes circuit designs, truth tables, simulations, and practical implementations. Covers core concepts of logic gates, combinational & sequential circuits, and hands-on problem-solving in digital systems.
This repository contains my assignments and projects for the Digital Systems course. The course covers the fundamental concepts of digital systems, including Boolean algebra, logic gates, combinational and sequential circuits, memory, and programmable logic devices. I have included VHDL code and simulation results for some of the projects.
Digital Design Lab - Autumn Semester 2021 - Indian Institute of Technology Bombay
A hardware-based 4-bit ALU designed in Tinkercad using adder and multiplexer ICs to perform addition and subtraction, with output on a 7-segment display. A project in Digital Logic Design.
This Include Every verilog code of most of Digital Electronics .
This repository contains the solutions of the problems given on HDLbits site.
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