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itch-protocol

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fpga-trading-systems

Complete end-to-end FPGA trading system: hardware acceleration (<5μs latency), kernel bypass (AF_XDP, DPDK), automated market maker, FIX 4.2 execution engine. 35 projects from Ethernet PHY to multi-platform apps. Real NASDAQ ITCH validation (563K+ samples). Production-grade low-latency architecture. LLM-Inference

  • Updated Apr 18, 2026
  • VHDL

Production-level ultra-low-latency trading infrastructure in C++23. Matching engine, FIX/ITCH/FAST protocols, kernel-bypass networking, WAL persistence, Raft consensus, and adversarial market simulation. Built for sub-microsecond p99 latency.

  • Updated Apr 28, 2026

A modular Rust toolkit for NASDAQ TotalView-ITCH 5.0. Strongly-typed, zero-allocation protocol codec for all 20 messages; sibling async transports for SoupBinTCP, MoldUDP64, and plain TCP; demo client and server; designed so each crate can be used independently. Spec-faithful, no unsafe.

  • Updated May 6, 2026
  • Rust

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