Fix slang errors and warnings in Koios benchmarks

vtr_flow/benchmarks/verilog/koios/attention_layer.v

@@ -164,7 +164,7 @@ wordwise_bram_2 out_buffer34
 );
 
 //Softmax layer has a parallelism of 4
-softmax soft(
+softmax softmax(
 	.inp(data_to_softmax),
 	.sub0_inp(data_to_softmax),
 	.sub1_inp(data_to_softmax),

vtr_flow/benchmarks/verilog/koios/conv_layer_hls.v

@@ -18,6 +18,7 @@
 // Abridged for VTR by: Daniel Rauch
 //////////////////////////////////////////////////////////////////////////////
 
+`timescale 1 ns / 1 ps
 
 module dpram (
 
@@ -134,8 +135,6 @@ dual_port_ram u_dual_port_ram(
 
 endmodule
 
-`timescale 1 ns / 1 ps
-
 module td_fused_top_Block_entry_proc_proc505 (
         ap_clk,
         ap_rst,

vtr_flow/benchmarks/verilog/koios/dnnweaver.v

@@ -156,12 +156,15 @@ module fifo
 // ******************************************************************
 // FIFO Logic
 // ******************************************************************
+
+/*
   initial begin
     if (INITIALIZE_FIFO == "yes") begin
       $readmemh(INIT, mem, 0, RAM_DEPTH-1);
     end
   end
-
+*/
+
   always @ (r_fifo_count)
   begin : FIFO_STATUS
     empty   = (r_fifo_count == 0);
@@ -1588,7 +1591,8 @@ module axi_master
     .s_write_ready                  ( rd_req_buf_wr_ready            ), //output
     .s_write_data                   ( rd_req_buf_data_in             ), //input
     .almost_full                    ( rd_req_buf_almost_full         ), //output
-    .almost_empty                   ( rd_req_buf_almost_empty        )  //output
+    .almost_empty                   ( rd_req_buf_almost_empty        ), //output
+    .fifo_count                     (                                )  //output
   );
 //==============================================================================
 
@@ -1622,7 +1626,8 @@ module axi_master
     .s_write_ready                  ( rx_req_id_buf_wr_ready         ), //output
     .s_write_data                   ( rx_req_id_buf_data_in          ), //input
     .almost_full                    ( rx_req_id_buf_almost_full      ), //output
-    .almost_empty                   ( rx_req_id_buf_almost_empty     )  //output
+    .almost_empty                   ( rx_req_id_buf_almost_empty     ), //output
+    .fifo_count                     (                                )  //output
   );
 
 
@@ -1799,7 +1804,8 @@ module axi_master
     .s_write_ready                  ( wr_req_buf_wr_ready            ), //output
     .s_write_data                   ( wr_req_buf_data_in             ), //input
     .almost_full                    ( wr_req_buf_almost_full         ), //output
-    .almost_empty                   ( wr_req_buf_almost_empty        )  //output
+    .almost_empty                   ( wr_req_buf_almost_empty        ), //output
+    .fifo_count                     (                                )  //output
   );
 //==============================================================================
 
@@ -1899,7 +1905,8 @@ module axi_master
     .s_write_ready                  ( wdata_req_buf_wr_ready         ), //output
     .s_write_data                   ( wdata_req_buf_data_in          ), //input
     .almost_full                    ( wdata_req_buf_almost_full      ), //output
-    .almost_empty                   ( wdata_req_buf_almost_empty     )  //output
+    .almost_empty                   ( wdata_req_buf_almost_empty     ), //output
+    .fifo_count                     (                                )  //output
   );
 //==============================================================================