Skip to content

Conversation

AmirhosseinPoolad
Copy link
Contributor

The scatter-gather parsing logic was just skipping parsing the from/to tags of wireconn specification. There was also a typo where I checked gather_wireconn twice and scatter_wireconn zero times. Not sure how it passed CI before. I noticed a failure when running strong tests locally.

@github-actions github-actions bot added libarchfpga Library for handling FPGA Architecture descriptions lang-cpp C/C++ code labels Aug 22, 2025
@vaughnbetz
Copy link
Contributor

It seems there is still a CI failure:
Error: Required case k6_frac_N10_frac_chain_mem32K_40nm.xml/ch_intrinsics.v missing from task results: /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_scatter_gather/run001/parse_results.txt

Test 'vtr_reg_strong' had -1 qor test failures

Test 'vtr_reg_strong' had 0 run failures

@AmirhosseinPoolad
Copy link
Contributor Author

It worked locally on my machine but apparently there's an issue. Seems like the fix wasn't really that hot.

@vaughnbetz
Copy link
Contributor

Hi @AmirhosseinPoolad : probably if this can't be fixed soon you should disable this test temporarily so CI doesn't have spurious failures.

@vaughnbetz vaughnbetz merged commit 08f39e2 into master Aug 25, 2025
30 checks passed
@vaughnbetz vaughnbetz deleted the hotfix_sg branch August 25, 2025 20:10
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
lang-cpp C/C++ code libarchfpga Library for handling FPGA Architecture descriptions
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants