You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Problem:
After adding XSPI1 compatibility macros (hal_stm32#328), the XSPI PSRAM driver still had STM32H5-incompatible code that assumed all STM32 XSPI peripherals have the same features (XSPI Manager, 16-line data mode, MaxTran/MemorySelect fields).
Solution:
Use XSPIM (XSPI Manager) configuration only when xspi_mgr clock exists (STM32H7RS)
Use 16-line data mode when HAL_XSPI_DATA_16_LINES is defined (STM32H7RS), otherwise 8-line (STM32H5)
Include MaxTran and MemorySelect Init fields only when XSPIM exists
Benefits:
STM32H7RS: Uses full hardware capabilities (16-line XSPI with dual-port manager)
STM32H5 (H573): Works with simpler single-port XSPI/OCTOSPI implementation (8-line max)
Automatic adaptation based on devicetree and HAL feature detection
Testing:
Verified compilation on STM32H573I-DK with XSPI PSRAM driver enabled
Hello @Ayushkothari96, and thank you very much for your first pull request to the Zephyr project!
Our Continuous Integration pipeline will execute a series of checks on your Pull Request commit messages and code, and you are expected to address any failures by updating the PR. Please take a look at our commit message guidelines to find out how to format your commit messages, and at our contribution workflow to understand how to update your Pull Request. If you haven't already, please make sure to review the project's Contributor Expectations and update (by amending and force-pushing the commits) your pull request if necessary.
If you are stuck or need help please join us on Discord and ask your question there. Additionally, you can escalate the review when applicable. 😊
Add conditional compilation to support different STM32 XSPI HAL
capabilities across product lines:
- Use XSPIM (XSPI Manager) configuration when available (STM32H7RS)
- Use 16-line data mode on STM32H7RS, 8-line on STM32H5
- Include MaxTran and MemorySelect Init fields only when XSPIM exists
This allows the driver to automatically use full hardware
capabilities on STM32H7RS (16-line XSPI with dual-port manager)
while maintaining compatibility with STM32H5 series that have
simpler single-port XSPI/OCTOSPI implementation with 8-line max.
Related to zephyrproject-rtos/hal_stm32#328
Signed-off-by: Ayush Kothari <ayushkot96@gmail.com>
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Ayushkothari96
force-pushed
the
fix-stm32-xspi-psram-hal-compatibility
branch
from
zephyrbot
requested review from
FRASTM,
GeorgeCGV,
djiatsaf-st,
erwango,
etienne-lms,
gautierg-st,
juickar and
mathieuchopstm
Fixes #99191
Add conditional compilation to support different STM32 XSPI HAL capabilities across product lines.
Related PRs:
Problem:
After adding XSPI1 compatibility macros (hal_stm32#328), the XSPI PSRAM driver still had STM32H5-incompatible code that assumed all STM32 XSPI peripherals have the same features (XSPI Manager, 16-line data mode, MaxTran/MemorySelect fields).
Solution:
xspi_mgrclock exists (STM32H7RS)HAL_XSPI_DATA_16_LINESis defined (STM32H7RS), otherwise 8-line (STM32H5)Benefits:
Testing:
memc_stm32_xspi_psram.c.obj