[top_darjeeling_no_ibex] Generate Ibex-less version of top_darjeeling

hw/Makefile

@@ -1,3 +1,4 @@
+# Copyright zeroRISC Inc.
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
@@ -48,7 +49,7 @@ IPS ?= aes           \
        uart          \
        usbdev
 
-TOPS ?= top_darjeeling top_earlgrey top_englishbreakfast
+TOPS ?= top_darjeeling top_darjeeling_no_ibex top_earlgrey top_englishbreakfast
 
 USE_BUFFER ?= 0
 

hw/ip_templates/otp_ctrl/rtl/otp_ctrl_part_pkg.sv.tpl

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
@@ -225,9 +226,17 @@ package otp_ctrl_part_pkg;
     ${int(part["size"])*8}'({
     % for item in part["items"][::-1]:
       % if offset != item['offset'] + item['size']:
+        % if (offset - item['size'] - item['offset']) * 8 >= 65536:
+      ${"{{{}'h{:0X}, {}'h{:0X}}}".format((offset - item['size'] - item['offset']) * 8 - 65536, 0, 65536, 0)}, // unallocated space<% offset = item['offset'] + item['size'] %>
+        % else:
       ${"{}'h{:0X}".format((offset - item['size'] - item['offset']) * 8, 0)}, // unallocated space<% offset = item['offset'] + item['size'] %>
+        % endif
       % endif
+      % if item["size"] * 8 >= 65536:
+      ${"{{{}'h{:0X}, {}'h{:0X}}}".format(item["size"] * 8 - 65536, item["inv_default"], 65536, item["inv_default"])}${("\n    })," if k < len(otp_mmap["partitions"])-1 else "\n    })});") if loop.last else ","}<% offset -= item['size'] %>
+      % else:
       ${"{}'h{:0X}".format(item["size"] * 8, item["inv_default"])}${("\n    })," if k < len(otp_mmap["partitions"])-1 else "\n    })});") if loop.last else ","}<% offset -= item['size'] %>
+      % endif
     % endfor
   % endfor
 

hw/top_darjeeling/data/autogen/BUILD

@@ -1,3 +1,4 @@
+# Copyright zeroRISC Inc.
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/data/autogen/defs.bzl

@@ -1,3 +1,4 @@
+# Copyright zeroRISC Inc.
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/ip/xbar_dbg/data/autogen/xbar_dbg.gen.hjson

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/ip/xbar_main/data/autogen/xbar_main.gen.hjson

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/ip/xbar_mbx/data/autogen/xbar_mbx.gen.hjson

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/ip/xbar_peri/data/autogen/xbar_peri.gen.hjson

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/ip_autogen/otp_ctrl/rtl/otp_ctrl_part_pkg.sv

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
@@ -566,7 +567,7 @@ package otp_ctrl_part_pkg;
     78784'({
       64'hC469C593E5DC0DA8,
       5184'h0, // unallocated space
-      73536'h0
+      {8000'h0, 65536'h0}
     }),
     8192'({
       8192'h0

hw/top_darjeeling/rtl/autogen/top_darjeeling.sv

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0

hw/top_darjeeling/templates/toplevel.sv.tpl

@@ -1,3 +1,4 @@
+// Copyright zeroRISC Inc.
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
@@ -17,6 +18,7 @@ top_has_alert_handler = lib.find_module(top['module'], 'alert_handler') is not N
 top_has_ast           = lib.find_module(top['module'], 'ast') is not None
 top_has_rstmgr        = lib.find_module(top['module'], 'rstmgr') is not None
 top_has_gpio          = lib.find_module(top['module'], 'gpio') is not None
+top_has_ibex          = lib.find_module(top['module'], 'rv_core_ibex') is not None
 top_has_scan_en = False
 for m in top['module']:
   if not lib.is_inst(m):
@@ -380,6 +382,7 @@ module top_${top["name"]} #(
   assign rsts_ast_o = ${top['resets'].hier_paths['top'][:-1]};
 % endif
 
+% if top_has_ibex:
   // ibex specific assignments
   // TODO: This should be further automated in the future.
   assign rv_core_ibex_irq_timer = intr_rv_timer_timer_expired_hart0_timer0;
@@ -388,15 +391,16 @@ module top_${top["name"]} #(
   // Unconditionally disable the late debug feature and enable early debug
   assign rv_dm_otp_dis_rv_dm_late_debug = prim_mubi_pkg::MuBi8True;
 
-% if 'rv_core_ibex_boot_addr' in (sig['signame'] for sig in top['inter_signal']['definitions']):
-  ## Not all top levels have a rom controller.
-  ## For those that do not, reference the ROM directly.
-<% num_rom_ctrl = lib.num_rom_ctrl(top["module"]) %>\
-  % if num_rom_ctrl != 0:
-  assign rv_core_ibex_boot_addr = ADDR_SPACE_ROM_CTRL0__ROM;
-  % else:
-  ## Not all top levels have
-  assign rv_core_ibex_boot_addr = ADDR_SPACE_ROM;
+  % if 'rv_core_ibex_boot_addr' in (sig['signame'] for sig in top['inter_signal']['definitions']):
+    ## Not all top levels have a rom controller.
+    ## For those that do not, reference the ROM directly.
+  <% num_rom_ctrl = lib.num_rom_ctrl(top["module"]) %>\
+    % if num_rom_ctrl != 0:
+assign rv_core_ibex_boot_addr = ADDR_SPACE_ROM_CTRL0__ROM;
+    % else:
+    ## Not all top levels have
+assign rv_core_ibex_boot_addr = ADDR_SPACE_ROM;
+    % endif
   % endif
 % endif
 

hw/top_darjeeling_no_ibex/data/autogen/BUILD

@@ -0,0 +1,11 @@
+# Copyright zeroRISC Inc.
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------#
+# PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+# util/topgen.py -t hw/top_darjeeling_no_ibex/data/top_darjeeling_no_ibex.hjson
+# -o hw/top_darjeeling_no_ibex
+
+exports_files(["top_darjeeling_no_ibex.gen.hjson"])

hw/top_darjeeling_no_ibex/data/autogen/defs.bzl

@@ -0,0 +1,77 @@
+# Copyright zeroRISC Inc.
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------#
+# PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+# util/topgen.py -t hw/top_darjeeling_no_ibex/data/top_darjeeling_no_ibex.hjson
+# -o hw/top_darjeeling_no_ibex
+
+load("//hw/top_darjeeling_no_ibex/ip_autogen/ac_range_check:defs.bzl", "AC_RANGE_CHECK")
+load("//hw/ip/aes:defs.bzl", "AES")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/alert_handler:defs.bzl", "ALERT_HANDLER")
+load("//hw/ip/aon_timer:defs.bzl", "AON_TIMER")
+load("//hw/top_darjeeling_no_ibex/ip/ast:defs.bzl", "AST")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/clkmgr:defs.bzl", "CLKMGR")
+load("//hw/ip/csrng:defs.bzl", "CSRNG")
+load("//hw/ip/dma:defs.bzl", "DMA")
+load("//hw/ip/edn:defs.bzl", "EDN")
+load("//hw/ip/entropy_src:defs.bzl", "ENTROPY_SRC")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/gpio:defs.bzl", "GPIO")
+load("//hw/ip/hmac:defs.bzl", "HMAC")
+load("//hw/ip/i2c:defs.bzl", "I2C")
+load("//hw/ip/keymgr_dpe:defs.bzl", "KEYMGR_DPE")
+load("//hw/ip/kmac:defs.bzl", "KMAC")
+load("//hw/ip/lc_ctrl:defs.bzl", "LC_CTRL")
+load("//hw/ip/mbx:defs.bzl", "MBX")
+load("//hw/ip/otbn:defs.bzl", "OTBN")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/otp_ctrl:defs.bzl", "OTP_CTRL")
+load("//hw/ip/otp_macro:defs.bzl", "OTP_MACRO")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/pinmux:defs.bzl", "PINMUX")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/pwrmgr:defs.bzl", "PWRMGR")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/racl_ctrl:defs.bzl", "RACL_CTRL")
+load("//hw/ip/rom_ctrl:defs.bzl", "ROM_CTRL")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/rstmgr:defs.bzl", "RSTMGR")
+load("//hw/top_darjeeling_no_ibex/ip_autogen/rv_plic:defs.bzl", "RV_PLIC")
+load("//hw/ip/soc_dbg_ctrl:defs.bzl", "SOC_DBG_CTRL")
+load("//hw/top_darjeeling_no_ibex/ip/soc_proxy:defs.bzl", "SOC_PROXY")
+load("//hw/ip/spi_device:defs.bzl", "SPI_DEVICE")
+load("//hw/ip/spi_host:defs.bzl", "SPI_HOST")
+load("//hw/ip/sram_ctrl:defs.bzl", "SRAM_CTRL")
+load("//hw/ip/uart:defs.bzl", "UART")
+
+DARJEELING_NO_IBEX_IPS = [
+    AC_RANGE_CHECK,
+    AES,
+    ALERT_HANDLER,
+    AON_TIMER,
+    AST,
+    CLKMGR,
+    CSRNG,
+    DMA,
+    EDN,
+    ENTROPY_SRC,
+    GPIO,
+    HMAC,
+    I2C,
+    KEYMGR_DPE,
+    KMAC,
+    LC_CTRL,
+    MBX,
+    OTBN,
+    OTP_CTRL,
+    OTP_MACRO,
+    PINMUX,
+    PWRMGR,
+    RACL_CTRL,
+    ROM_CTRL,
+    RSTMGR,
+    RV_PLIC,
+    SOC_DBG_CTRL,
+    SOC_PROXY,
+    SPI_DEVICE,
+    SPI_HOST,
+    SRAM_CTRL,
+    UART,
+]