[Arista] Jericho4L cModel: WIP Vendor mappings for bringup

cmake/Agent.cmake

@@ -162,6 +162,7 @@ target_link_libraries(utils
   meru800bia_platform_mapping
   meru800bfa_platform_mapping
   janga800bic_platform_mapping
+  j4sim_platform_mapping
   icecube800banw_platform_mapping
   icecube800bc_platform_mapping
   icetea800bc_platform_mapping

cmake/AgentPlatformsCommon.cmake

@@ -56,6 +56,7 @@ target_link_libraries(platform_mapping_utils
   ladakh800bcls_platform_mapping
   minipack3bta_platform_mapping
   icecube800banw_platform_mapping
+  j4sim_platform_mapping
   platform_mode
   ${RE2}
 )

cmake/AgentPlatformsCommonJ4Sim.cmake

@@ -0,0 +1,12 @@
+# CMake to build libraries and binaries in fboss/agent/platforms/common/j4sim
+
+# In general, libraries and binaries in fboss/foo/bar are built by
+# cmake/FooBar.cmake
+
+add_library(j4sim_platform_mapping
+  fboss/agent/platforms/common/j4sim/J4SimPlatformMapping.cpp
+)
+
+target_link_libraries(j4sim_platform_mapping
+  platform_mapping
+)

cmake/AgentPlatformsSai.cmake

@@ -58,6 +58,8 @@ set(SAI_PLATFORM_SRC
   fboss/agent/platforms/sai/SaiYangraPlatformPort.cpp
   fboss/agent/platforms/sai/SaiMinipack3NPlatformPort.cpp
 # platform oss srcs (== fake_srcs)
+  fboss/agent/platforms/sai/SaiBcmJ4SimPlatform.cpp
+  fboss/agent/platforms/sai/SaiBcmJ4SimPlatformPort.cpp
   fboss/agent/platforms/sai/oss/SaiBcmMinipackPlatform.cpp
   fboss/agent/platforms/sai/oss/SaiBcmPlatform.cpp
   fboss/agent/platforms/sai/oss/SaiBcmMinipackPlatformPort.cpp
@@ -131,6 +133,7 @@ target_link_libraries(sai_platform
   icecube800banw_platform_mapping
   icecube800bc_platform_mapping
   icetea800bc_platform_mapping
+  j4sim_platform_mapping
   led_structs_types_cpp2
   led_mapping_cpp2
   wedge800bact_platform_mapping

fboss/agent/ApplyThriftConfig.cpp

@@ -1175,6 +1175,7 @@ void ThriftConfigApplier::processUpdatedDsfNodes() {
             asicCore = 1;
             break;
           case cfg::AsicType::ASIC_TYPE_JERICHO3:
+          case cfg::AsicType::ASIC_TYPE_JERICHO4:
             if (isDualStage3Q2QMode()) {
               asicCore = 447;
             } else {

fboss/agent/AsicUtils.cpp

@@ -10,6 +10,7 @@
 #include "fboss/agent/AsicUtils.h"
 #include "fboss/agent/hw/switch_asics/Jericho2Asic.h"
 #include "fboss/agent/hw/switch_asics/Jericho3Asic.h"
+#include "fboss/agent/hw/switch_asics/Jericho4Asic.h"
 #include "fboss/agent/hw/switch_asics/Ramon3Asic.h"
 #include "fboss/agent/hw/switch_asics/RamonAsic.h"
 
@@ -39,6 +40,11 @@ const HwAsic& getHwAsicForAsicType(const cfg::AsicType& asicType) {
       static Jericho3Asic jericho3Asic{switchId, switchInfo};
       return jericho3Asic;
     }
+    case cfg::AsicType::ASIC_TYPE_JERICHO4: {
+      switchInfo.switchType() = cfg::SwitchType::VOQ;
+      static Jericho4Asic jericho4Asic{switchId, switchInfo};
+      return jericho4Asic;
+    }
     case cfg::AsicType::ASIC_TYPE_RAMON: {
       switchInfo.switchType() = cfg::SwitchType::FABRIC;
       static RamonAsic ramonAsic{switchId, switchInfo};
@@ -82,6 +88,8 @@ uint32_t getFabricPortsPerVirtualDevice(const cfg::AsicType asicType) {
       return 192;
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
       return 160;
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
+      return 160;
     case cfg::AsicType::ASIC_TYPE_RAMON3:
       return 256;
     case cfg::AsicType::ASIC_TYPE_FAKE:

fboss/agent/hw/bcm/BcmPlatform.cpp

@@ -114,6 +114,7 @@ phy::VCOFrequency BcmPlatform::getVCOFrequency(
     case cfg::PortSpeed::GIGE:
       [[fallthrough]];
     case cfg::PortSpeed::EIGHTHUNDREDG:
+    case cfg::PortSpeed::ONEPOINTSIXT:
     case cfg::PortSpeed::THREEPOINTTWOT:
     case cfg::PortSpeed::DEFAULT:
       return phy::VCOFrequency::UNKNOWN;

fboss/agent/hw/sai/hw_test/HwTestTamUtils.cpp

@@ -141,6 +141,7 @@ void triggerParityError(HwSwitchEnsemble* ensemble) {
       triggerBcmJericho2ParityError(ensemble);
       break;
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
       triggerBcmJericho3ParityError(ensemble);
       break;
     case cfg::AsicType::ASIC_TYPE_CHENAB:

fboss/agent/hw/sai/hw_test/HwTestTamUtilsThriftHandler.cpp

@@ -236,6 +236,7 @@ void HwTestThriftHandler::triggerParityError() {
       triggerBcmJericho2ParityError(hwSwitch_);
       break;
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
       triggerBcmJericho3ParityError(hwSwitch_);
       break;
     case cfg::AsicType::ASIC_TYPE_CHENAB:

fboss/agent/hw/sai/switch/SaiAclTableManager.cpp

@@ -1682,8 +1682,9 @@ std::set<cfg::AclTableQualifier> SaiAclTableManager::getSupportedQualifierSet(
       platform_->getAsic()->getAsicType() == cfg::AsicType::ASIC_TYPE_TRIDENT2;
   bool isJericho2 =
       platform_->getAsic()->getAsicType() == cfg::AsicType::ASIC_TYPE_JERICHO2;
-  bool isJericho3 =
-      platform_->getAsic()->getAsicType() == cfg::AsicType::ASIC_TYPE_JERICHO3;
+  bool isJericho3 = platform_->getAsic()->getAsicType() ==
+          cfg::AsicType::ASIC_TYPE_JERICHO3 ||
+      platform_->getAsic()->getAsicType() == cfg::AsicType::ASIC_TYPE_JERICHO4;
   bool isTomahawk5 =
       platform_->getAsic()->getAsicType() == cfg::AsicType::ASIC_TYPE_TOMAHAWK5;
   bool isChenab =

fboss/agent/hw/sai/switch/SaiBufferManager.cpp

@@ -109,6 +109,7 @@ void assertMaxBufferPoolSize(const SaiPlatform* platform) {
       break;
     case cfg::AsicType::ASIC_TYPE_JERICHO2:
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
     case cfg::AsicType::ASIC_TYPE_TRIDENT2:
       CHECK_EQ(maxEgressPoolSize, availableBuffer);
       break;
@@ -201,6 +202,7 @@ uint64_t SaiBufferManager::getMaxEgressPoolBytes(const SaiPlatform* platform) {
     }
     case cfg::AsicType::ASIC_TYPE_JERICHO2:
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
       /*
        * XXX: TODO: Need to check if there is a way to compute the
        * buffers available for use in Jericho2 without using the

fboss/agent/hw/sai/switch/SaiPortManager.cpp

@@ -611,6 +611,7 @@ int getWorstCaseAssumedOpticsDelayNS(
     case cfg::AsicType::ASIC_TYPE_G202X:
       break;
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
       if (portType == cfg::PortType::FABRIC_PORT) {
         return 110;
       } else {

fboss/agent/hw/sai/switch/SaiVirtualRouterManager.cpp

@@ -110,6 +110,7 @@ SaiVirtualRouterManager::createMplsRouterInterface(VirtualRouterSaiId vrId) {
     case cfg::AsicType::ASIC_TYPE_SANDIA_PHY:
     case cfg::AsicType::ASIC_TYPE_JERICHO2:
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
     case cfg::AsicType::ASIC_TYPE_RAMON:
     case cfg::AsicType::ASIC_TYPE_RAMON3:
     case cfg::AsicType::ASIC_TYPE_CHENAB:

fboss/agent/hw/sai/switch/tests/ManagerTestBase.cpp

@@ -253,8 +253,9 @@ std::shared_ptr<Port> ManagerTestBase::makePort(
       swPort->setProfileId(cfg::PortProfileID::PROFILE_DEFAULT);
       break;
     case cfg::PortSpeed::GIGE:
+    case cfg::PortSpeed::ONEPOINTSIXT:
     case cfg::PortSpeed::THREEPOINTTWOT:
-      throw FbossError("profile gig and 3.2T ethernet is not available");
+      throw FbossError("profile gig, 1.6T and 3.2T ethernet is not available");
     case cfg::PortSpeed::XG:
       swPort->setProfileId(cfg::PortProfileID::PROFILE_10G_1_NRZ_NOFEC_OPTICAL);
       break;

fboss/agent/hw/switch_asics/HwAsic.cpp

@@ -18,6 +18,7 @@
 #include "fboss/agent/hw/switch_asics/G202xAsic.h"
 #include "fboss/agent/hw/switch_asics/Jericho2Asic.h"
 #include "fboss/agent/hw/switch_asics/Jericho3Asic.h"
+#include "fboss/agent/hw/switch_asics/Jericho4Asic.h"
 #include "fboss/agent/hw/switch_asics/MockAsic.h"
 #include "fboss/agent/hw/switch_asics/Ramon3Asic.h"
 #include "fboss/agent/hw/switch_asics/RamonAsic.h"
@@ -120,6 +121,8 @@ std::unique_ptr<HwAsic> HwAsic::makeAsic(
       return std::make_unique<Jericho2Asic>(switchId, switchInfo, sdkVersion);
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
       return std::make_unique<Jericho3Asic>(switchId, switchInfo, sdkVersion);
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
+      return std::make_unique<Jericho4Asic>(switchId, switchInfo, sdkVersion);
     case cfg::AsicType::ASIC_TYPE_RAMON:
       return std::make_unique<RamonAsic>(switchId, switchInfo, sdkVersion);
     case cfg::AsicType::ASIC_TYPE_RAMON3:

fboss/agent/hw/switch_asics/Jericho3Asic.cpp

@@ -74,7 +74,6 @@ bool Jericho3Asic::isSupported(Feature feature) const {
     case HwAsic::Feature::WARMBOOT:
     case HwAsic::Feature::PQP_ERROR_EGRESS_DROP_COUNTER:
     case HwAsic::Feature::FABRIC_LINK_DOWN_CELL_DROP_COUNTER:
-    case HwAsic::Feature::SAI_FEC_CODEWORDS_STATS:
     case HwAsic::Feature::CRC_ERROR_DETECT:
     case HwAsic::Feature::ACL_METADATA_QUALIFER:
     case HwAsic::Feature::EVENTOR_PORT_FOR_SFLOW:
@@ -250,6 +249,12 @@ bool Jericho3Asic::isSupported(Feature feature) const {
     case HwAsic::Feature::VIRTUAL_ARS_GROUP:
     case HwAsic::Feature::ECN_PROBABILISTIC_MARKING:
     case HwAsic::Feature::SWITCH_DROP_DEBUG_COUNTER:
+    // Disabling some counters for the time being.
+    // This will result in an early return in
+    // SaiDebugCounterManager::setupTrapDropCounter(), which is currently
+    // failing with SAI 14.x
+    case HwAsic::Feature::ANY_TRAP_DROP_COUNTER:
+    case HwAsic::Feature::SAI_FEC_CODEWORDS_STATS:
       return false;
   }
   return false;

fboss/agent/hw/switch_asics/Jericho4Asic.h

@@ -0,0 +1,39 @@
+// Copyright 2004-present Facebook. All Rights Reserved.
+
+#pragma once
+
+#include <optional>
+#include "fboss/agent/hw/switch_asics/Jericho3Asic.h"
+
+namespace facebook::fboss {
+
+class Jericho4Asic : public Jericho3Asic {
+ public:
+  Jericho4Asic(
+      std::optional<int64_t> switchId,
+      cfg::SwitchInfo switchInfo,
+      std::optional<cfg::SdkVersion> sdkVersion = std::nullopt)
+      : Jericho3Asic(switchId, switchInfo, sdkVersion) {}
+
+  cfg::AsicType getAsicType() const override {
+    return cfg::AsicType::ASIC_TYPE_JERICHO4;
+  }
+
+  cfg::PortSpeed getMaxPortSpeed() const override {
+    return cfg::PortSpeed::ONEPOINTSIXT;
+  }
+
+  bool isSupported(Feature feature) const override {
+    // TBD if necessary
+    if (feature == HwAsic::Feature::SWITCH_ISOLATE) {
+      return false;
+    }
+    return Jericho3Asic::isSupported(feature);
+
+  // Jericho4 cModel bringup is using Jericho4L (99410) which only has 4 cores
+  uint32_t getNumCores() const override {
+    return 4;
+  }
+};
+
+} // namespace facebook::fboss

fboss/agent/hw/test/HwHashPolarizationTestUtils.cpp

@@ -57,6 +57,7 @@ std::unique_ptr<std::vector<utility::EthFrame>> getFullHashedPackets(
       case cfg::AsicType::ASIC_TYPE_AGERA3:
       case cfg::AsicType::ASIC_TYPE_JERICHO2:
       case cfg::AsicType::ASIC_TYPE_JERICHO3:
+      case cfg::AsicType::ASIC_TYPE_JERICHO4:
       case cfg::AsicType::ASIC_TYPE_RAMON:
       case cfg::AsicType::ASIC_TYPE_RAMON3:
       case cfg::AsicType::ASIC_TYPE_G202X:
@@ -88,6 +89,7 @@ std::unique_ptr<std::vector<utility::EthFrame>> getFullHashedPackets(
       case cfg::AsicType::ASIC_TYPE_SANDIA_PHY:
       case cfg::AsicType::ASIC_TYPE_JERICHO2:
       case cfg::AsicType::ASIC_TYPE_JERICHO3:
+      case cfg::AsicType::ASIC_TYPE_JERICHO4:
       case cfg::AsicType::ASIC_TYPE_RAMON:
       case cfg::AsicType::ASIC_TYPE_RAMON3:
       case cfg::AsicType::ASIC_TYPE_G202X:

fboss/agent/hw/test/dataplane_tests/HwProdInvariantHelper.cpp

@@ -174,6 +174,7 @@ void HwProdInvariantHelper::verifySafeDiagCmds() {
     case cfg::AsicType::ASIC_TYPE_SANDIA_PHY:
     case cfg::AsicType::ASIC_TYPE_JERICHO2:
     case cfg::AsicType::ASIC_TYPE_JERICHO3:
+    case cfg::AsicType::ASIC_TYPE_JERICHO4:
     case cfg::AsicType::ASIC_TYPE_RAMON:
     case cfg::AsicType::ASIC_TYPE_RAMON3:
     case cfg::AsicType::ASIC_TYPE_TOMAHAWK5:

fboss/agent/platforms/common/BUCK

@@ -34,6 +34,7 @@ cpp_library(
     exported_deps = [
         ":platform_mapping",
         "//fboss/agent:fboss-error",
+        "//fboss/agent/platforms/common/j4sim:j4sim_platform_mapping",
         "//fboss/agent/platforms/common/darwin:darwin_platform_mapping",
         "//fboss/agent/platforms/common/elbert:elbert_platform_mapping",
         "//fboss/agent/platforms/common/fake_test:fake_test_platform_mapping",

fboss/agent/platforms/common/PlatformMappingUtils.cpp

@@ -23,6 +23,7 @@
 #include "fboss/agent/platforms/common/icecube800banw/Icecube800banwPlatformMapping.h"
 #include "fboss/agent/platforms/common/icecube800bc/Icecube800bcPlatformMapping.h"
 #include "fboss/agent/platforms/common/icetea800bc/Icetea800bcPlatformMapping.h"
+#include "fboss/agent/platforms/common/j4sim/J4SimPlatformMapping.h"
 #include "fboss/agent/platforms/common/janga800bic/Janga800bicPlatformMapping.h"
 #include "fboss/agent/platforms/common/ladakh800bcls/Ladakh800bclsPlatformMapping.h"
 #include "fboss/agent/platforms/common/meru400bfu/Meru400bfuPlatformMapping.h"
@@ -219,6 +220,10 @@ std::unique_ptr<PlatformMapping> initPlatformMapping(PlatformType type) {
       return platformMappingStr.empty()
           ? std::make_unique<Ladakh800bclsPlatformMapping>()
           : std::make_unique<Ladakh800bclsPlatformMapping>(platformMappingStr);
+    case PlatformType::PLATFORM_J4SIM:
+      return platformMappingStr.empty()
+          ? std::make_unique<J4SimPlatformMapping>()
+          : std::make_unique<J4SimPlatformMapping>(platformMappingStr);
     case PlatformType::PLATFORM_FAKE_SAI: {
       std::vector<int> controllingPorts = getFakeSaiControllingPortIDs();
       return std::make_unique<FakeTestPlatformMapping>(controllingPorts);

fboss/agent/platforms/common/j4sim/BUCK

@@ -0,0 +1,16 @@
+load("@fbcode_macros//build_defs:cpp_library.bzl", "cpp_library")
+
+oncall("fboss_agent_push")
+
+cpp_library(
+    name = "j4sim_platform_mapping",
+    srcs = [
+        "J4SimPlatformMapping.cpp",
+    ],
+    headers = [
+        "J4SimPlatformMapping.h",
+    ],
+    exported_deps = [
+        "//fboss/agent/platforms/common:platform_mapping",
+    ],
+)