Add initial support for Armv8.1-m targets

Makefile

@@ -24,6 +24,12 @@ SHELL := /bin/bash
 
 all: build
 
+TARGET_PLATFORM ?=
+SOURCES=
+ifneq ($(TARGET_PLATFORM),)
+include test/mk/platform.mk
+endif
+
 W := $(EXEC_WRAPPER)
 
 # Detect available SHA256 command
@@ -61,7 +67,7 @@ run_func_87: func_87
 run_func: run_func_44 run_func_65 run_func_87
 
 run_acvp: acvp
-	python3 ./test/acvp_client.py $(if $(ACVP_VERSION),--version $(ACVP_VERSION))
+	EXEC_WRAPPER="$(EXEC_WRAPPER)" python3 ./test/acvp_client.py $(if $(ACVP_VERSION),--version $(ACVP_VERSION))
 
 func_44: $(MLDSA44_DIR)/bin/test_mldsa44
 	$(Q)echo "  FUNC       ML-DSA-44:   $^"

test/baremetal/platform/m55-an547/exec_wrapper.py

@@ -0,0 +1,36 @@
+#!/usr/bin/env python3
+# Copyright (c) The mldsa-native project authors
+# SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
+
+import struct as st
+import sys
+import tempfile
+import subprocess
+
+def err(msg, **kwargs):
+    print(msg, file=sys.stderr, **kwargs)
+
+binpath = sys.argv[1]
+args = sys.argv[1:]
+cmdline_offset = 0x70000
+
+arg0_offset = cmdline_offset + 4 + len(args) * 4
+
+arg_offsets  = [
+    sum(map(len, args[:i])) + i + arg0_offset for i in range(len(args))
+]
+
+binargs = st.pack(f"<{1+len(args)}I"+''.join(f'{len(a)+1}s' for a in args),len(args), *arg_offsets, *map(lambda x: x.encode("utf-8"), args))
+with open('args.bin', 'wb') as fd:
+    fd.write(binargs)
+
+qemu_cmd = f'qemu-system-arm -M mps3-an547 -semihosting -nographic -semihosting -kernel {binpath} -device loader,file=args.bin,addr=0x{cmdline_offset:x}'.split()
+result = subprocess.run(qemu_cmd, encoding="utf-8", capture_output=True)
+if result.returncode != 0:
+    err("FAIL!")
+    err(f"{qemu_cmd} failed with error code {result.returncode}")
+    err(result.stderr)
+    exit(1)
+
+for line in result.stdout.splitlines():
+    print(line)

test/baremetal/platform/m55-an547/platform.mk

@@ -0,0 +1,51 @@
+# Copyright (c) The mldsa-native project authors
+# SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
+
+HAL_SRC_DIR=$(PLATFORM_PATH)/src
+HAL_INC_DIR=$(PLATFORM_PATH)/inc
+
+CROSS_PREFIX=arm-none-eabi-
+CC=gcc
+
+CFLAGS += \
+	-O3 \
+	-Wall -Wextra -Wshadow \
+	-fno-common \
+	-ffunction-sections \
+	-fdata-sections \
+	--sysroot=$(SYSROOT) \
+	-DDEVICE=\"an547\" \
+	-I$(HAL_INC_DIR) \
+	-DARMCM55 \
+
+ARCH_FLAGS += \
+	-march=armv8.1-m.main+mve.fp \
+	-mcpu=cortex-m55 \
+	-mthumb \
+	-mfloat-abi=hard -mfpu=fpv4-sp-d16 \
+
+CFLAGS += \
+	$(ARCH_FLAGS) \
+	--specs=nosys.specs \
+	-g \
+
+CFLAGS += $(CFLAGS_EXTRA)
+
+LDSCRIPT = $(HAL_SRC_DIR)/platform/mps3.ld
+
+LDFLAGS += \
+	-Wl,--gc-sections \
+	-L.
+
+LDFLAGS += \
+	--specs=nosys.specs \
+	-Wl,--wrap=_open \
+	-Wl,--wrap=_read \
+	-Wl,--wrap=_write \
+	-Wl,--wrap=main \
+	-ffreestanding \
+	-T$(LDSCRIPT) \
+	$(ARCH_FLAGS)
+
+SOURCES += $(wildcard $(HAL_SRC_DIR)/*.c) $(wildcard $(HAL_SRC_DIR)/*/*.c) 
+EXEC_WRAPPER := $(PLATFORM_PATH)/exec_wrapper.py

test/baremetal/platform/m55-an547/src/platform/ARMCM55.h

@@ -0,0 +1,136 @@
+/**************************************************************************//**
+ * @file     ARMCM55.h
+ * @brief    CMSIS Core Peripheral Access Layer Header File for
+ *           ARMCM55 Device Series (configured for ARMCM55 with double precision FPU,
+ *                                  DSP extension, MVE, TrustZone)
+ * @version  V1.0.0
+ * @date     27. March 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef ARMCM55_H
+#define ARMCM55_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* -------------------------  Interrupt Number Definition  ------------------------ */
+
+typedef enum IRQn
+{
+/* -------------------  Processor Exceptions Numbers  ----------------------------- */
+  NonMaskableInt_IRQn           = -14,     /*  2 Non Maskable Interrupt */
+  HardFault_IRQn                = -13,     /*  3 HardFault Interrupt */
+  MemoryManagement_IRQn         = -12,     /*  4 Memory Management Interrupt */
+  BusFault_IRQn                 = -11,     /*  5 Bus Fault Interrupt */
+  UsageFault_IRQn               = -10,     /*  6 Usage Fault Interrupt */
+  SecureFault_IRQn              =  -9,     /*  7 Secure Fault Interrupt */
+  SVCall_IRQn                   =  -5,     /* 11 SVC Interrupt */
+  DebugMonitor_IRQn             =  -4,     /* 12 Debug Monitor Interrupt */
+  PendSV_IRQn                   =  -2,     /* 14 Pend SV Interrupt */
+  SysTick_IRQn                  =  -1,     /* 15 System Tick Interrupt */
+
+/* -------------------  Processor Interrupt Numbers  ------------------------------ */
+  Interrupt0_IRQn               =   0,
+  Interrupt1_IRQn               =   1,
+  Interrupt2_IRQn               =   2,
+  Interrupt3_IRQn               =   3,
+  Interrupt4_IRQn               =   4,
+  Interrupt5_IRQn               =   5,
+  Interrupt6_IRQn               =   6,
+  Interrupt7_IRQn               =   7,
+  Interrupt8_IRQn               =   8,
+  Interrupt9_IRQn               =   9
+  /* Interrupts 10 .. 480 are left out */
+} IRQn_Type;
+
+
+/* ================================================================================ */
+/* ================      Processor and Core Peripheral Section     ================ */
+/* ================================================================================ */
+
+/* -------  Start of section using anonymous unions and disabling warnings  ------- */
+#if   defined (__CC_ARM)
+  #pragma push
+  #pragma anon_unions
+#elif defined (__ICCARM__)
+  #pragma language=extended
+#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wc11-extensions"
+  #pragma clang diagnostic ignored "-Wreserved-id-macro"
+#elif defined (__GNUC__)
+  /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+  /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+  #pragma warning 586
+#elif defined (__CSMC__)
+  /* anonymous unions are enabled by default */
+#else
+  #warning Not supported compiler type
+#endif
+
+
+/* --------  Configuration of Core Peripherals  ----------------------------------- */
+#define __CM55_REV                0x0001U   /* Core revision r0p1 */
+#define __NVIC_PRIO_BITS          3U        /* Number of Bits used for Priority Levels */
+#define __Vendor_SysTickConfig    0U        /* Set to 1 if different SysTick Config is used */
+#define __VTOR_PRESENT            1U        /* VTOR present */
+#define __MPU_PRESENT             1U        /* MPU present */
+#define __FPU_PRESENT             1U        /* FPU present */
+#define __FPU_DP                  1U        /* double precision FPU */
+#define __DSP_PRESENT             1U        /* DSP extension present */
+#define __SAUREGION_PRESENT       1U        /* SAU regions present */
+#define __PMU_PRESENT             1U        /* PMU present */
+#define __PMU_NUM_EVENTCNT        8U        /* PMU Event Counters */
+#define __ICACHE_PRESENT          1U        /* Instruction Cache present */
+#define __DCACHE_PRESENT          1U        /* Data Cache present */
+
+#include "core_cm55.h"                      /* Processor and core peripherals */
+#include "system_ARMCM55.h"                 /* System Header */
+
+
+/* --------  End of section using anonymous unions and disabling warnings  -------- */
+#if   defined (__CC_ARM)
+  #pragma pop
+#elif defined (__ICCARM__)
+  /* leave anonymous unions enabled */
+#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+  #pragma clang diagnostic pop
+#elif defined (__GNUC__)
+  /* anonymous unions are enabled by default */
+#elif defined (__TMS470__)
+  /* anonymous unions are enabled by default */
+#elif defined (__TASKING__)
+  #pragma warning restore
+#elif defined (__CSMC__)
+  /* anonymous unions are enabled by default */
+#else
+  #warning Not supported compiler type
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  /* ARMCM55_H */