Rollup of 11 pull requests

compiler/rustc_ast_lowering/src/delegation.rs

@@ -96,7 +96,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
                 let generics = self.lower_delegation_generics(span);
                 DelegationResults { body_id, sig, ident, generics }
             }
-            Err(err) => self.generate_delegation_error(err, span),
+            Err(err) => self.generate_delegation_error(err, span, delegation),
         }
     }
 
@@ -404,6 +404,7 @@ impl<'hir> LoweringContext<'_, 'hir> {
         &mut self,
         err: ErrorGuaranteed,
         span: Span,
+        delegation: &Delegation,
     ) -> DelegationResults<'hir> {
         let generics = self.lower_delegation_generics(span);
 
@@ -418,8 +419,41 @@ impl<'hir> LoweringContext<'_, 'hir> {
         let header = self.generate_header_error();
         let sig = hir::FnSig { decl, header, span };
 
-        let ident = Ident::dummy();
-        let body_id = self.lower_body(|this| (&[], this.mk_expr(hir::ExprKind::Err(err), span)));
+        let ident = self.lower_ident(delegation.ident);
+
+        let body_id = self.lower_body(|this| {
+            let body_expr = match delegation.body.as_ref() {
+                Some(box block) => {
+                    // Generates a block when we failed to resolve delegation, where a target expression is its only statement,
+                    // thus there will be no ICEs on further stages of analysis (see #144594)
+
+                    // As we generate a void function we want to convert target expression to statement to avoid additional
+                    // errors, such as mismatched return type
+                    let stmts = this.arena.alloc_from_iter([hir::Stmt {
+                        hir_id: this.next_id(),
+                        kind: rustc_hir::StmtKind::Semi(
+                            this.arena.alloc(this.lower_target_expr(block)),
+                        ),
+                        span,
+                    }]);
+
+                    let block = this.arena.alloc(hir::Block {
+                        stmts,
+                        expr: None,
+                        hir_id: this.next_id(),
+                        rules: hir::BlockCheckMode::DefaultBlock,
+                        span,
+                        targeted_by_break: false,
+                    });
+
+                    hir::ExprKind::Block(block, None)
+                }
+                None => hir::ExprKind::Err(err),
+            };
+
+            (&[], this.mk_expr(body_expr, span))
+        });
+
         DelegationResults { ident, generics, body_id, sig }
     }
 

compiler/rustc_borrowck/src/diagnostics/conflict_errors.rs

@@ -3940,13 +3940,30 @@ impl<'infcx, 'tcx> MirBorrowckCtxt<'_, 'infcx, 'tcx> {
         if let Some(decl) = local_decl
             && decl.can_be_made_mutable()
         {
+            let is_for_loop = matches!(
+                            decl.local_info(),
+                            LocalInfo::User(BindingForm::Var(VarBindingForm {
+                                opt_match_place: Some((_, match_span)),
+                                ..
+                            })) if matches!(match_span.desugaring_kind(), Some(DesugaringKind::ForLoop))
+            );
+            let message = if is_for_loop
+                && let Ok(binding_name) =
+                    self.infcx.tcx.sess.source_map().span_to_snippet(decl.source_info.span)
+            {
+                format!("(mut {}) ", binding_name)
+            } else {
+                "mut ".to_string()
+            };
             err.span_suggestion_verbose(
                 decl.source_info.span.shrink_to_lo(),
                 "consider making this binding mutable",
-                "mut ".to_string(),
+                message,
                 Applicability::MachineApplicable,
             );
+
             if !from_arg
+                && !is_for_loop
                 && matches!(
                     decl.local_info(),
                     LocalInfo::User(BindingForm::Var(VarBindingForm {

compiler/rustc_codegen_llvm/src/back/write.rs

@@ -75,7 +75,7 @@ fn write_output_file<'ll>(
     let result = unsafe {
         let pm = llvm::LLVMCreatePassManager();
         llvm::LLVMAddAnalysisPasses(target, pm);
-        llvm::LLVMRustAddLibraryInfo(pm, m, no_builtins);
+        llvm::LLVMRustAddLibraryInfo(target, pm, m, no_builtins);
         llvm::LLVMRustWriteOutputFile(
             target,
             pm,

compiler/rustc_codegen_llvm/src/lib.rs

@@ -257,6 +257,10 @@ impl CodegenBackend for LlvmCodegenBackend {
                 }
                 writeln!(out).unwrap();
             }
+            PrintKind::BackendHasZstd => {
+                let has_zstd = llvm::LLVMRustLLVMHasZstdCompression();
+                writeln!(out, "{has_zstd}").unwrap();
+            }
             PrintKind::CodeModels => {
                 writeln!(out, "Available code models:").unwrap();
                 for name in &["tiny", "small", "kernel", "medium", "large"] {

compiler/rustc_codegen_llvm/src/llvm/ffi.rs

@@ -2379,6 +2379,7 @@ unsafe extern "C" {
     ) -> *mut TargetMachine;
 
     pub(crate) fn LLVMRustAddLibraryInfo<'a>(
+        T: &TargetMachine,
         PM: &PassManager<'a>,
         M: &'a Module,
         DisableSimplifyLibCalls: bool,

compiler/rustc_const_eval/src/interpret/intrinsics.rs

@@ -40,18 +40,20 @@ pub(crate) enum MinMax {
     /// In particular, `-0.0` is considered smaller than `+0.0` and
     /// if either input is NaN, the result is NaN.
     Minimum,
-    /// The IEEE-2008 `minNum` operation - see `f32::min` etc.
+    /// The IEEE-2008 `minNum` operation with the SNaN handling of the
+    /// IEEE-2019 `minimumNumber` operation - see `f32::min` etc.
     /// In particular, if the inputs are `-0.0` and `+0.0`, the result is non-deterministic,
-    /// and if one argument is NaN, the other one is returned.
-    MinNum,
+    /// and if one argument is NaN (quiet or signaling), the other one is returned.
+    MinimumNumber,
     /// The IEEE-2019 `maximum` operation - see `f32::maximum` etc.
     /// In particular, `-0.0` is considered smaller than `+0.0` and
     /// if either input is NaN, the result is NaN.
     Maximum,
-    /// The IEEE-2008 `maxNum` operation - see `f32::max` etc.
+    /// The IEEE-2008 `maxNum` operation with the SNaN handling of the
+    /// IEEE-2019 `maximumNumber` operation - see `f32::max` etc.
     /// In particular, if the inputs are `-0.0` and `+0.0`, the result is non-deterministic,
-    /// and if one argument is NaN, the other one is returned.
-    MaxNum,
+    /// and if one argument is NaN (quiet or signaling), the other one is returned.
+    MaximumNumber,
 }
 
 /// Directly returns an `Allocation` containing an absolute path representation of the given type.
@@ -524,10 +526,18 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                 self.write_scalar(Scalar::from_target_usize(align.bytes(), self), dest)?;
             }
 
-            sym::minnumf16 => self.float_minmax_intrinsic::<Half>(args, MinMax::MinNum, dest)?,
-            sym::minnumf32 => self.float_minmax_intrinsic::<Single>(args, MinMax::MinNum, dest)?,
-            sym::minnumf64 => self.float_minmax_intrinsic::<Double>(args, MinMax::MinNum, dest)?,
-            sym::minnumf128 => self.float_minmax_intrinsic::<Quad>(args, MinMax::MinNum, dest)?,
+            sym::minnumf16 => {
+                self.float_minmax_intrinsic::<Half>(args, MinMax::MinimumNumber, dest)?
+            }
+            sym::minnumf32 => {
+                self.float_minmax_intrinsic::<Single>(args, MinMax::MinimumNumber, dest)?
+            }
+            sym::minnumf64 => {
+                self.float_minmax_intrinsic::<Double>(args, MinMax::MinimumNumber, dest)?
+            }
+            sym::minnumf128 => {
+                self.float_minmax_intrinsic::<Quad>(args, MinMax::MinimumNumber, dest)?
+            }
 
             sym::minimumf16 => self.float_minmax_intrinsic::<Half>(args, MinMax::Minimum, dest)?,
             sym::minimumf32 => {
@@ -538,10 +548,18 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
             }
             sym::minimumf128 => self.float_minmax_intrinsic::<Quad>(args, MinMax::Minimum, dest)?,
 
-            sym::maxnumf16 => self.float_minmax_intrinsic::<Half>(args, MinMax::MaxNum, dest)?,
-            sym::maxnumf32 => self.float_minmax_intrinsic::<Single>(args, MinMax::MaxNum, dest)?,
-            sym::maxnumf64 => self.float_minmax_intrinsic::<Double>(args, MinMax::MaxNum, dest)?,
-            sym::maxnumf128 => self.float_minmax_intrinsic::<Quad>(args, MinMax::MaxNum, dest)?,
+            sym::maxnumf16 => {
+                self.float_minmax_intrinsic::<Half>(args, MinMax::MaximumNumber, dest)?
+            }
+            sym::maxnumf32 => {
+                self.float_minmax_intrinsic::<Single>(args, MinMax::MaximumNumber, dest)?
+            }
+            sym::maxnumf64 => {
+                self.float_minmax_intrinsic::<Double>(args, MinMax::MaximumNumber, dest)?
+            }
+            sym::maxnumf128 => {
+                self.float_minmax_intrinsic::<Quad>(args, MinMax::MaximumNumber, dest)?
+            }
 
             sym::maximumf16 => self.float_minmax_intrinsic::<Half>(args, MinMax::Maximum, dest)?,
             sym::maximumf32 => {
@@ -966,16 +984,16 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
     {
         let a: F = a.to_float()?;
         let b: F = b.to_float()?;
-        let res = if matches!(op, MinMax::MinNum | MinMax::MaxNum) && a == b {
+        let res = if matches!(op, MinMax::MinimumNumber | MinMax::MaximumNumber) && a == b {
             // They are definitely not NaN (those are never equal), but they could be `+0` and `-0`.
             // Let the machine decide which one to return.
             M::equal_float_min_max(self, a, b)
         } else {
             let result = match op {
                 MinMax::Minimum => a.minimum(b),
-                MinMax::MinNum => a.min(b),
+                MinMax::MinimumNumber => a.min(b),
                 MinMax::Maximum => a.maximum(b),
-                MinMax::MaxNum => a.max(b),
+                MinMax::MaximumNumber => a.max(b),
             };
             self.adjust_nan(result, &[a, b])
         };

compiler/rustc_const_eval/src/interpret/intrinsics/simd.rs

@@ -202,8 +202,8 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                     sym::simd_le => Op::MirOp(BinOp::Le),
                     sym::simd_gt => Op::MirOp(BinOp::Gt),
                     sym::simd_ge => Op::MirOp(BinOp::Ge),
-                    sym::simd_fmax => Op::FMinMax(MinMax::MaxNum),
-                    sym::simd_fmin => Op::FMinMax(MinMax::MinNum),
+                    sym::simd_fmax => Op::FMinMax(MinMax::MaximumNumber),
+                    sym::simd_fmin => Op::FMinMax(MinMax::MinimumNumber),
                     sym::simd_saturating_add => Op::SaturatingOp(BinOp::Add),
                     sym::simd_saturating_sub => Op::SaturatingOp(BinOp::Sub),
                     sym::simd_arith_offset => Op::WrappingOffset,
@@ -295,8 +295,8 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                     sym::simd_reduce_xor => Op::MirOp(BinOp::BitXor),
                     sym::simd_reduce_any => Op::MirOpBool(BinOp::BitOr),
                     sym::simd_reduce_all => Op::MirOpBool(BinOp::BitAnd),
-                    sym::simd_reduce_max => Op::MinMax(MinMax::MaxNum),
-                    sym::simd_reduce_min => Op::MinMax(MinMax::MinNum),
+                    sym::simd_reduce_max => Op::MinMax(MinMax::MaximumNumber),
+                    sym::simd_reduce_min => Op::MinMax(MinMax::MinimumNumber),
                     _ => unreachable!(),
                 };
 
@@ -320,8 +320,8 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
                             } else {
                                 // Just boring integers, no NaNs to worry about.
                                 let mirop = match mmop {
-                                    MinMax::MinNum | MinMax::Minimum => BinOp::Le,
-                                    MinMax::MaxNum | MinMax::Maximum => BinOp::Ge,
+                                    MinMax::MinimumNumber | MinMax::Minimum => BinOp::Le,
+                                    MinMax::MaximumNumber | MinMax::Maximum => BinOp::Ge,
                                 };
                                 if self.binary_op(mirop, &res, &op)?.to_scalar().to_bool()? {
                                     res

compiler/rustc_driver_impl/src/lib.rs

@@ -799,6 +799,7 @@ fn print_crate_info(
                 println_info!("{}", calling_conventions.join("\n"));
             }
             RelocationModels
+            | BackendHasZstd
             | CodeModels
             | TlsModels
             | TargetCPUs

compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp

@@ -6,6 +6,9 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Analysis/Lint.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
+#if LLVM_VERSION_GE(22, 0)
+#include "llvm/Analysis/RuntimeLibcallInfo.h"
+#endif
 #include "llvm/Bitcode/BitcodeWriter.h"
 #include "llvm/Bitcode/BitcodeWriterPass.h"
 #include "llvm/CodeGen/CommandFlags.h"
@@ -379,13 +382,20 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
 
 // Unfortunately, the LLVM C API doesn't provide a way to create the
 // TargetLibraryInfo pass, so we use this method to do so.
-extern "C" void LLVMRustAddLibraryInfo(LLVMPassManagerRef PMR, LLVMModuleRef M,
+extern "C" void LLVMRustAddLibraryInfo(LLVMTargetMachineRef T,
+                                       LLVMPassManagerRef PMR, LLVMModuleRef M,
                                        bool DisableSimplifyLibCalls) {
   auto TargetTriple = Triple(unwrap(M)->getTargetTriple());
+  TargetOptions *Options = &unwrap(T)->Options;
   auto TLII = TargetLibraryInfoImpl(TargetTriple);
   if (DisableSimplifyLibCalls)
     TLII.disableAllFunctions();
   unwrap(PMR)->add(new TargetLibraryInfoWrapperPass(TLII));
+#if LLVM_VERSION_GE(22, 0)
+  unwrap(PMR)->add(new RuntimeLibraryInfoWrapper(
+      TargetTriple, Options->ExceptionModel, Options->FloatABIType,
+      Options->EABIVersion, Options->MCOptions.ABIName, Options->VecLib));
+#endif
 }
 
 extern "C" void LLVMRustSetLLVMOptions(int Argc, char **Argv) {

compiler/rustc_resolve/src/late/diagnostics.rs

@@ -1155,6 +1155,7 @@ impl<'ast, 'ra, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
         let callsite_span = span.source_callsite();
         for rib in self.ribs[ValueNS].iter().rev() {
             for (binding_ident, _) in &rib.bindings {
+                // Case 1: the identifier is defined in the same scope as the macro is called
                 if binding_ident.name == ident.name
                     && !binding_ident.span.eq_ctxt(span)
                     && !binding_ident.span.from_expansion()
@@ -1166,6 +1167,19 @@ impl<'ast, 'ra, 'tcx> LateResolutionVisitor<'_, 'ast, 'ra, 'tcx> {
                     );
                     return;
                 }
+
+                // Case 2: the identifier is defined in a macro call in the same scope
+                if binding_ident.name == ident.name
+                    && binding_ident.span.from_expansion()
+                    && binding_ident.span.source_callsite().eq_ctxt(callsite_span)
+                    && binding_ident.span.source_callsite().lo() < callsite_span.lo()
+                {
+                    err.span_help(
+                        binding_ident.span,
+                        "an identifier with the same name is defined here, but is not accessible due to macro hygiene",
+                    );
+                    return;
+                }
             }
         }
     }

compiler/rustc_session/src/config/print_request.rs

@@ -22,6 +22,7 @@ pub struct PrintRequest {
 pub enum PrintKind {
     // tidy-alphabetical-start
     AllTargetSpecsJson,
+    BackendHasZstd,
     CallingConventions,
     Cfg,
     CheckCfg,
@@ -59,6 +60,7 @@ impl PrintKind {
         match self {
             // tidy-alphabetical-start
             AllTargetSpecsJson => "all-target-specs-json",
+            BackendHasZstd => "backend-has-zstd",
             CallingConventions => "calling-conventions",
             Cfg => "cfg",
             CheckCfg => "check-cfg",
@@ -111,6 +113,7 @@ impl PrintKind {
 
             // Unstable values:
             AllTargetSpecsJson => false,
+            BackendHasZstd => false, // (perma-unstable, for use by compiletest)
             CheckCfg => false,
             CrateRootLintLevels => false,
             SupportedCrateTypes => false,