Skip to content

Patch Release v2.34.2
Compare
Choose a tag to compare
@ruck314 ruck314 released this 01 Sep 15:56
· 1360 commits to main since this release
v2.34.2
f9fea6d
This commit was created on GitHub.com and signed with GitHub’s verified signature. The key has expired.
GPG key ID: 4AEE18F83AFDEB23
Expired
Verified
Learn about vigilant mode.

Pull Requests Since v2.34.1

Bug

  1. #1001 - Properly exit poll thread when stopping AxiLiteMasterProxy.py

Enhancement

  1. #987 - Enhancements to PRBS modules
  2. #1000 - update to StdRtlPkg.vhd

Unlabeled

  1. #1003 - Bug fix for ClinkFraming.vhd & whitespace clean up

Pull Request Details

update to StdRtlPkg.vhd
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Sep 1 00:28:20 2022 -0500
Pull: #1000 (2 additions, 0 deletions, 1 files changed)
Branch: slaclab/new-slv-array
Labels: enhancement

Notes:

Description

  • adding Slv512Array & Slv512VectorArray

Properly exit poll thread when stopping AxiLiteMasterProxy.py
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Sep 1 00:29:16 2022 -0500
Pull: #1001 (8 additions, 0 deletions, 1 files changed)
Branch: slaclab/axi-lite-proxy-fix
Labels: bug

Notes:

Description

AxiLiteMasterProxy spins up a thread to handle its transactions. This thread was not being stopped when the Root was stopped, leading the applications hanging open. This has been fixed.

JIRA

https://jira.slac.stanford.edu/browse/ESROGUE-515

Related

Bug fix for ClinkFraming.vhd & whitespace clean up
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Sep 1 10:31:58 2022 -0500
Pull: #1003 (54 additions, 42 deletions, 2 files changed)
Branch: slaclab/clink-deca-patch

Notes:

Description

Enhancements to PRBS modules
Author: Benjamin Reese bengineerd@users.noreply.github.com
Date: Wed Aug 31 21:46:56 2022 -0700
Pull: #987 (337 additions, 311 deletions, 8 files changed)
Branch: slaclab/prbs-registers
Labels: enhancement

Notes:

Description

  • AxiStreamMon
    • Use statusRst to reset the min and max statistics.
    • Previously used axisRst.
    • Previously could not reset packet rate statistics.
  • SsiPrbsRateGen
    • Allow an asynchronous localClk input that runs internal logic.
    • Use only 8 bits of AXI-Lite address space instead of 12.
  • SsiPrbsRx/SsiPrbsTx
    • Remap AXI-Lite register space to use 8 address bits instead of 10.
    • Use "new" style AXI-Lite procedures from AxiLitePkg.
  • Software
    • Update with new register mappings for SsiPrbsRx and SsiPrbsTx.
    • Add useful LinkedVariables to SsiPrbsRateGen.

Details

We will need to discuss the changes in SsiPrbsRx and SsiPrbsTx. It should be fine as long as projects distribute software properly with their firmware. But it could happen that someone tries to use new SURF software to access PRBS modules on legacy firmware and then it wont work.

The extra address bits in the PRBS modules were becoming a problem in a project where many of these modules were instantiated. It was cumbersome to fit them all in the available address space on a PCIe project where you don't have the full 32 bits of address space for the firmware application.

Assets 2
Loading